A power converter using a switching signal having at least three levels of amplitude, one of which amplitude levels has a zero amplitude level during a predetermined switching interval, is provided. The power converter includes a circuit module having first and second input terminals for receiving the switching signal. The circuit module in turn is made up of a first power transistor and second power transistor. Circuitry is electrically coupled to a predetermined one of the power transistors for maintaining a predetermined voltage level across the gate terminal of the predetermined one of the power transistors during the switching interval of zero amplitude. The predetermined voltage level is chosen to enable that predetermined power transistor to continue in a respective "on" state notwithstanding of the presence of the switching interval of substantially zero amplitude. The circuitry further allows for removing or discharging the predetermined voltage upon termination of the switching interval of zero amplitude level to enable the predetermined power transistor to transition to a respective "off" state. The power converter may be conveniently used to extend a self-driving synchronous rectification technique to a broader range of output voltages and circuit topologies and provides over-voltage protection to the gates power transistors, and the capability to directly parallel additional modules.
The present invention provides a self-driving circuit for DC/DC converter of a low voltage, high current, and high power density. The converter comprises a transformer, output rectification portion SR.sub.1 and voltage clamping. The first configuration of the self-driving circuit consists of resisters R.sub.a1, R.sub.a2, capacitors C.sub.a1, C.sub.a2, transistors Q.sub.a1, Q.sub.a2 ; and the second configuration consists of Da, small power MOS transistor SRa, an auxiliary winding Nsa, a delay driving circuit and a isolating differential circuit. The self-driving circuit of the present invention may reduce the cross-conductive loss, and increase the converting efficiency.
A resonant reset forward converter including a gate drive mechanism for controlling the conduction periods of a free-wheeling rectifier on the secondary side of the converter is disclosed. The gate drive mechanism is operative to turn on the free-wheeling rectifier at the beginning of the forward power cycle, maintain the free-wheeling rectifier in the on state during the transformer core reset and dead periods, and provide for rapid discharging of the freewheeling rectifier at the beginning of a subsequent forward power cycle.
This invention discloses rectifying circuits using normally "off" Junction Effect Transistor. By connecting the gate of the JFET to the higher bias terminal of the output coil of the transformer, the forward biased turn on function of the normally "off" JFETs can be achieved. Therefore, the normally "off" JFET can be used as synchronized zero voltage switching rectifier with very low voltage drop. Since normally "off" JFET is a majority carrier device, very high frequency response can be achieved. This kind of circuitry can replace the P-N junction and/or Schottky rectifiers especially when the supply voltage drops below three volts.
A two terminal semiconductor circuit that can be used to replace the semiconductor diodes used as rectifiers in conventional DC power supply circuits. Three semiconductor circuits that can efficiently supply the DC currents required in both discrete and integrated circuits being operated at low DC supply voltages are disclosed. All three circuits have a forward or current conducting state and a reverse or non current conducting state similar to a conventional semiconductor diode.
A self-driven synchronous rectification circuit which includes two power switches S.sub.1 and S.sub.2 ; a transformer Tr having a primary winding N.sub.p, a secondary winding N.sub.s and an auxiliary winding N.sub.a ; two secondary synchronous rectifiers S.sub.3 and S.sub.4 ; two diodes D.sub.1 and D.sub.2 ; two switching transistors Q.sub.1 and Q.sub.2 ; and two zener diodes ZD.sub.1 and ZD.sub.2. The number of auxiliary winding turns N.sub.a of the transformer Tr ensure that the synchronous rectifiers S.sub.3 and S.sub.4 are supplied with an adequate gate-drive voltage. When S.sub.3 conducts, the gate-drive voltage of S.sub.4 is clamped by D.sub.1 and Q.sub.1. Likewise, when S.sub.4 conducts, the gate-drive voltage of S.sub.3 is clamped by D.sub.2 and Q.sub.2. ZD.sub.1 and ZD.sub.2 operate to restrain the gate over voltage of S.sub.3 and S.sub.4, respectively. When the gate drive voltage of S.sub.4 is clamped by D.sub.1 and Q.sub.1, Q.sub.2 disables D.sub.2 and when the gate drive voltage of S.sub.3 is clamped by D.sub.2 and Q.sub.2, Q.sub.1 disables D.sub.1.
