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System for context switching between processing elements in a pipeline of processing elements    
United States Patent6101599   
Link to this pagehttp://www.wikipatents.com/6101599.html
Inventor(s)Wright; Michael L. (Raleigh, NC); Key; Kenneth Michael (Raleigh, NC); Kerr; Darren (Palo Alto, CA); Jennings; William E. (Cary, NC)
AbstractA system and technique facilitate fast context switching among processor complex stages of a pipelined processing engine. Each processor complex comprises a central processing unit (CPU) core having a plurality of internal context switchable registers that are connected to respective registers within CPU cores of the pipelined stages by a processor bus. The technique enables fast context switching by sharing the context switchable registers between upstream and downstream CPUs to, inter alia, force program counters into the downstream registers. In one aspect of the inventive technique, the system automatically reflects (shadows) the contents of an upstream CPU's context switchable registers at respective registers of a downstream CPU over the processor bus. In another aspect of the invention, the system redirects instruction execution by the downstream CPU to an appropriate routine based on processing performed by the upstream CPU.
   














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Patent Text Patent PDF Print Page Summary File History
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Inventor     Wright; Michael L. (Raleigh, NC); Key; Kenneth Michael (Raleigh, NC); Kerr; Darren (Palo Alto, CA); Jennings; William E. (Cary, NC)
Owner/Assignee     Cisco Technology, Inc. (San Jose, CA)
Patent assignment
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Publication Date     August 8, 2000
Application Number     09/106,244
PAIR File History     Application Data   Transaction History
Image File Wrapper   Patent Term   Fees
Litigation
Filing Date     June 29, 1998
US Classification    
Int'l Classification    
Examiner     Coleman; Eric
Assistant Examiner    
Attorney/Law Firm     Cesari and McKenna, LLP
Address
Parent Case     CROSS-REFERENCE TO RELATED APPLICATIONS This invention is related to the following copending U.S. patent applications: U.S. patent application Ser. No. 09/106,478 titled, PROGRAMMABLE ARRAYED PROCESSING ENGINE ARCHITECTURE FOR A NETWORK SWITCH; U.S. patent application Ser. No. 09/106,436 titled, ARCHITECTURE FOR A PROCESSOR COMPLEX OF AN ARRAYED PIPELINED PROCESSING ENGINE; and U.S. patent application Ser. No. 09/106,246 titled, SYNCHRONIZATION AND CONTROL SYSTEM FOR AN ARRAYED PROCESSING ENGINE, each of which was filed on even date herewith and assigned to the assignee of the present invention.
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Patent Tags     context switching between processing elements pipeline processing elements
   
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 References Submit all comments and votes
 
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Market Size
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$5B - $10B
$2B - $5B
$500M - $2B
$100M - $500M
$10M - $100M
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$0   $2.5B   $5B   $7.5B   $10B
Market Share
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25% - 49.99%
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2 - 4.99%
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Reasonable Royalty
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0%