A plasma processing apparatus for processing a substrate with a plasma is disclosed. The apparatus includes a first RF power source having a first RF frequency, and a process chamber. Further, the apparatus includes a substantially circular antenna operatively coupled to the first RF power source and disposed above a plane defined by the substrate when the substrate is disposed within the process chamber for processing. The substantially circular antenna being configured to induce an electric field inside the process chamber with a first RF energy generated by the first RF power source. The substantially circular antenna including at least a first pair of concentric loops in a first plane and a second pair of concentric loops in a second plane. The first pair of concentric loops and the second pair of concentric loops being substantially identical and symmetrically aligned with one another. The substantially circular antenna forming an azimuthally symmetric plasma inside the process chamber. The apparatus also includes a coupling window disposed between the antenna and the process chamber. The coupling window being configured to allow the passage of the first RF energy from the antenna to the interior of the process chamber. The coupling window having a first layer and a second layer. The second layer being configured to substantially suppress the capacitive coupling formed between the substantially circular antenna and the plasma. The substantially circular antenna and the coupling window working together to produce a substantially uniform process rate across the surface of the substrate.

A method for providing uniformity in plasma-assisted material processes. A shielding plate is implemented within a plasma chamber above a substrate. The dimensions, geometry, and location of the shielding plate are optimized to generate a desired ion flux in a plasma-assisted material process conducted in a plasma chamber.

A processing method includes patterning a material over a semiconductive substrate having a center and an edge. The method includes forming a layer of first material against a second material and over the semiconductive substrate and first etching the first material in a reaction chamber. First etching provides a first center-to-edge uniformity across the wafer surface and a first selectivity for the first material relative to the second material. The method also includes second etching the first material to provide a second center-to-edge uniformity across the wafer surface and a second selectivity greater than the first selectivity for the first material relative to the second material. The second center-to-edge uniformity is less than the first center-to-edge uniformity. The method also includes cleaning a component of the first material from at least one sidewall of the reaction chamber between the first and second etchings.

In one embodiment, the invention includes a method of removing at least a portion of a material from a substrate. The method includes providing a substrate in a reaction chamber, the substrate having a material supported thereover, and first etching the material while the substrate is in the reaction chamber. The method also includes, after the first etching, cleaning a component from at least one sidewall of the reaction chamber while the substrate remains therein; the component comprising a species that is present in the material. The cleaning includes exposing the sidewall and substrate to conditions which substantially selectively remove the component from the sidewall while not removing the material from the substrate, and not etching any other materials supported by the substrate. After the cleaning, the method includes second etching the material while the substrate is in the reaction chamber.