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Direct die contact (DDC) semiconductor package    
United States Patent6107122   
Link to this pagehttp://www.wikipatents.com/6107122.html
Inventor(s)Wood; Alan G. (Boise, ID), Farnworth; Warren M. (Nampa, ID), Grigg; Ford (Meridian, ID), Akram; Salman (Boise, ID)
AbstractA semiconductor package and method for fabricating the package are provided. The package includes a housing having individual channels, each adapted to retain a semiconductor die in electrical communication with electrical connectors. The dice can include solder bumps, formed on electrodes, using electroless deposition and wave soldering. For fabricating the package, the dice can be inserted into the channels, with the electrical connectors on the housing proximate to the solder bumps on the dice. The solder bumps can then be reflowed to form bonded connections with the electrical connectors. In an alternate embodiment, conductive adhesive bumps, rather than solder bumps, are formed on the dice to provide compliant connections with the electrical connectors on the housing. In addition, the conductive adhesive bumps can be cured while in contact with the electrical connectors to form bonded connections. Other alternate embodiments include a chip scale package, a temporary package for testing bare dice, and a multi chip module.
   














 Title Information Submit all comments and votes
 
Patent Text Patent PDF Print Page Summary File History
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Inventor     Wood; Alan G. (Boise, ID) , Farnworth; Warren M. (Nampa, ID) , Grigg; Ford (Meridian, ID) , Akram; Salman (Boise, ID)
Owner/Assignee     Micron Technology, Inc. (Boise, ID)
Patent assignment
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Publication Date     August 22, 2000
Application Number     08/905,602
PAIR File History     Application Data   Transaction History
Image File Wrapper   Patent Term   Fees
Litigation
Filing Date     August 4, 1997
US Classification     438/117 257/E21.508 257/E21.511 257/E23.021 438/119 438/613 439/630 439/81 439/876
Int'l Classification    
Examiner     Fahmy; Wael
Assistant Examiner     Eaton; Kurt
Attorney/Law Firm     Gratton; Stephen A.
Address
Parent Case    
Priority Data    
USPTO Field of Search     438/615 438/612 438/613 438/106 438/108 438/117 438/119 438/455 257/737 257/679 257/684 257/778 257/777 439/62 439/81 439/326 439/630 439/876
Patent Tags     direct die contact (ddc) semiconductor package
   
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 References Submit all comments and votes
 
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 U.S. References
 
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ReferenceRelevancyCommentsReferenceRelevancyComments
5910640
Farnworth et al.

Jun,1999

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5903058
Akram

May,1999

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5889327
Washida et al.

Mar,1999

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5888849
Johnson

Mar,1999

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5872400
Chapman et al.

Feb,1999

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5851911
Farnworth

Dec,1998

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5789278
Akram et al.

Aug,1998

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5795619
Lin et al.

Aug,1998

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5736456
Akram

Apr,1998

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5675889
Acocella et al.

Oct,1997

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5674785
Akram et al.

Oct,1997

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5633122
Tuttle

May,1997

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5617990
Thompson, Sr.

Apr,1997

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5592736
Akram et al.

Jan,1997

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5593927
Farnworth et al.

Jan,1997

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5578526
Akram et al.

Nov,1996

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5559444
Farnworth et al.

Sep,1996

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5547740
Higdon et al.

Aug,1996

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5531021
Kolman et al.

Jul,1996

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Gilleo et al.

Jul,1996

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5532612
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Wood et al.

May,1996

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Akram et al.

Jan,1996

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Nishiguchi

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$5B - $10B
$2B - $5B
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$0
 
$0   $2.5B   $5B   $7.5B   $10B
Market Share
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75% - 100%
50% - 74.99%
25% - 49.99%
10 - 24.99%
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< 1%
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0.0%
 
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Reasonable Royalty
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75% - 100%
50% - 74.99%
25% - 49.99%
10 - 24.99%
5 - 9.99%
2 - 4.99%
1 - 1.99%
< 1%
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0.0%
 
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 Technical Review Submit all comments and votes
 Claims Submit all comments and votes
 


What is claimed is:

1. A method for fabricating a semiconductor package comprising:

providing a semiconductor die comprising a face, a passivation layer on the face, and a plurality of electrodes on the face;

fabricating solder bumps on the electrodes by electrolessly depositing adhesion layers on the electrodes and moving the die proximate to a molten solder wave to deposit solder onto the adhesion layers;

providing a housing for retaining the die comprising a channel, a plurality of electrical connectors in the channel configured for bonding to the solder bumps, wherein the solder bumps and the electrical connectors are configured to allow placing of the die in the channel, and to allow contact of the electrical connectors and the solder bumps during placing of the die in the channel without damaging a passivation layer formed on an outer surface of the die;

placing the die in the channel with the solder bumps contacting the electrical connectors;

reflowing the solder bumps to form bonded connections with the electrical connectors to anchor the die in the channel and prevent movement of the electrical connectors.

2. The method of claim 1 wherein the electrical connectors comprise spring contacts extending into the channel and configured to compress the solder bumps.

3. The method of claim 1 wherein the electrodes comprise aluminum and the adhesion layers comprise a metal selected from the group consisting of Ni, Zn, Cr and Pd.

4. A method for fabricating a semiconductor package comprising:

providing a semiconductor die comprising a face, an outer layer on the face, and a plurality of electrodes on the face;

electrolessly depositing adhesion layers on the electrodes;

forming solder bumps on the adhesion layers by moving the die through a molten solder proximate to a molten solder wave;

providing a housing comprising a channel for receiving the die and a plurality of electrical connectors within the channel configured for bonding to the solder bumps;

placing the die within the channel with the solder bumps contacting the electrical connectors, wherein a geometry of the solder bumps and a shape of the electrical connectors are selected to allow contact of the electrical connectors and the solder bumps during the placing step without damage to the outer layer; and

reflowing the solder bumps to form bonded connections with the electrical connectors to anchor the die within the housing and prevent movement of the electrical connectors.

5. The method of claim 4 further comprising controlling the geometry of the solder bumps by selection of an orientation of the die relative to the solder wave, by selection of a temperature of the molten solder, and by selection of a speed with which the die moves through the molten solder.

6. The method of claim 4 wherein reflowing the solder bumps comprises placing the housing and the die within a conveyor furnace.

7. A method for fabricating a semiconductor package comprising:

providing a semiconductor die comprising a plurality of electrodes;

electrolessly depositing first metal layers on the electrodes;

depositing solder bumps on the first metal layers by moving the die through a molten solder proximate to a molten solder wave;

controlling a geometry of the solder bumps by selection of an orientation of the die relative to the solder wave, by selection of a temperature of the molten solder, and by selection of a speed with which the die moves through the molten solder;

providing a housing comprising a channel for retaining the die and a plurality of electrical connectors within the channel for electrically contacting the solder bumps, the connectors comprising a solderable metal configured for bonding to the solder bumps;

placing the die within the channel with the solder bumps contacting the electrical connectors, wherein the geometry of the solder bumps and a shape of the electrical connectors are selected to permit contacting of the solder bumps during the placing step without damaging the die; and

reflowing the solder bumps to bond the solder bumps to the electrical connectors and prevent movement of the die and the electrical connectors.

8. The method of claim 7 wherein the housing comprises a plurality of channels and the package comprises a plurality of semiconductor dice.

9. The method of claim 7 wherein the electrical connectors comprise copper or beryllium copper.

10. A method for fabricating a semiconductor package comprising:

providing a semiconductor die comprising a plurality of electrodes;

forming a plurality of raised contacts on the electrodes by depositing a conductive adhesive material thereon;

partially curing the conductive adhesive material to a B-stage condition;

providing a housing comprising a channel for retaining the die and a plurality of electrical connectors extending into the channel, the electrical connectors configured to contact and compress the raised contacts, without damaging an outer surface of the die;

placing the die within the channel with the electrical connectors compressing the raised contacts; and

following the placing step, curing the conductive adhesive material under compression from the electrical connectors, to bond the raised contacts to the electrical connectors, and to form electrically conductive paths therebetween.

11. The method of claim 10 wherein the partially curing step and the curing step comprise heating the conductive adhesive material.

12. The method of claim 10 wherein the raised contacts have a height, and the electrical connectors have a shape, selected to allow the placing step to be performed without damage to the die.

13. The method of claim 10 wherein the conductive adhesive material comprises an anisotropic adhesive.

14. A method for fabricating a semiconductor package comprising:

providing a semiconductor die comprising a plurality of electrodes;

forming a plurality of contacts on the electrodes comprising a conductive adhesive;

partially curing the contacts to a B-stage condition;

providing a housing comprising a channel configured to retain the die and a plurality of electrical connectors in the channel configured to contact and compress the contacts, the raised contacts and the electrical connectors configured to permit placing of the electrical connectors on the raised contacts without damage to the die;

placing the die within the channel with the electrical connectors compressing the contacts; and

bonding and electrically connecting the contacts to the electrical connectors by curing the conductive adhesive under compression from the electrical connectors.

15. The method of claim 14 wherein partially curing the contacts comprises heating the conductive adhesive.

16. The method of claim 14 wherein curing the conductive adhesive comprises heating the die and the conductive adhesive.

17. The method of claim 14 wherein curing the conductive adhesive comprises cooling the conductive adhesive and the die.

18. The method of claim 14 wherein the conductive adhesive comprises an anisotropic adhesive.

19. The method of claim 14 wherein the conductive adhesive comprises a resilient material.

20. The method of claim 14 wherein the electrical connectors comprise spring contacts sized and shaped to minimally contact a face of the die.