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Test board having a plurality of power supply wiring patterns
   
Document Number
US Patent 6107792
Issued Date
August 22, 2000
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Abstract
A test board for testing a semiconductor IC device has a plurality of device attachment pads which are to be electrically connected to a plurality of I/O pins of the semiconductor IC device, a plurality of land pads which are to be electrically connected to a plurality of probe pins of a testing apparatus, a plurality of signal wires electrically connecting the device attachment pads to the land pads, and a plurality of power supply wiring patterns for supplying power to the semiconductor IC device. The power supply wiring patterns include both internal power supply wiring patterns which are disposed radially inwardly of the device attachment pads, and external power supply wiring patterns which are disposed radially outwardly of the device attachment pads. When set up for testing, an IC socket is mounted to the test board. Whereas the device attachment pads, land pads and power supply wiring patterns are provided on the back surface of the test board, the IC socket is mounted to the front surface of the test board. The IC socket has a plurality of pins which are received in through-holes of the test board electrically connected to the device attachment pads. The test board of the present invention has an advantage in that the device attachment pads are easily connected to the power supply wiring patterns. Furthermore, the noise of the power supply can be reduced by the power supply wiring patterns.
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Number of Claims:
9
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Published
August 22, 2000
Application Number
09/081,563
Filed
May 19, 1998
US Classification
324/158.1   324/754 324/765
Int'l Classification
G01R   1/04   (20060101)   G01R   1/02   (20060101)  
Examiner
Assistant Examiner
Attorney/Law Firm
Priority Data
Jun 23, 1997 [KR] 97-26452
USPTO Field of Search
324/158.1   324/754   324/755   324/757   324/758   324/765  
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According to one aspect of the disclosure, the present invention provides methods and arrangements for testing a flip chip semiconductor device after the back side of the chip has been thinned to expose a selected region in the substrate. For some chips, thinning removes substrate material useful for drawing heat away from the internal circuitry when the circuitry is running at high speeds. To compensate for this material loss, a special test fixture having a heat-dissipating device is arranged to draw heat from the device.

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Description
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