A system for testing a microelectronic circuit includes a test bed for mounting a microelectronic circuit, and a signal source for applying a signal to a microelectronic circuit mounted on the test bed. The system additionally includes a test probe for wirelessly receiving electromagnetic response signals from the microelectronic circuit mounted on the test bed. In a preferred form, the electromagnetic response signals are radio-frequency signals. The test system additionally includes a computer connected to be test probe for analyzing the electromagnetic response signals. An integrated circuit for testing on the test system has a test circuit portion that emits electromagnetic radiation in response to a predetermined signal applied to the test circuit.

An apparatus includes at least one tag holder capable of receiving and holding a plurality of tags. The apparatus also includes at least one antenna capable of receiving wireless signals from the plurality of tags during a test of the tags. The apparatus may further include at least one of a temperature controller capable of controlling a temperature experienced by the tags during the test and a humidity controller capable of controlling a humidity experienced by the tags during the test. The at least one tag holder may include a plurality of guides capable of receiving and holding the tags, a plurality of rods capable of supporting the guides, and a plurality of spacers capable of maintaining a distance between adjacent guides.

A method and apparatus according to the present invention enable wafer chips to be configured with a single power on and off sequence and further enable a chip parameter to be adjusted during a wafer test without utilizing that sequence. In particular, each wafer chip under test is assigned a unique programmable identification. Once each chip has been assigned a corresponding identification, the chips may each be individually accessible by that identification to provide parameter values to chip registers to configure that chip. The configured chips may be subsequently tested in parallel to evaluate the parameter settings. In addition, the present invention enables chips to share data I/O pins or lines, thereby reducing the quantity of testing machine pins utilized for each chip and enabling a greater quantity of chips to be tested in a parallel fashion.

A non-contact tester for electronic circuits consists of an electronic circuit and independent scanning head, in combination. The electronic circuit includes a micro-fabricated wireless i/o cell and means for sending and receiving signals via the wireless i/o cell. The independent scanning head has a wireless i/o cell that is compatible with the wireless i/o cell on the electronic circuit. This enables data to be exchanged with the electronic circuit to confirm proper functioning of the electronic circuit.

One or more antennas are formed on an integrated circuit (IC) chip and connected to other circuitry on the IC chip. Antenna configurations include loop, multi-turn loop, square spiral, long wire, or dipole. The antenna may be formed to have two or more segments which can selectively be connected to one another to alter an effective length of the antenna. Two antennas may be formed in two different metallization layers separated by an insulating layer. Additionally, an antenna may be incorporated in a heat sink structure that is joined to the IC chip. IC chips having antennas are suitably included in a system or subsystem having electrical functionality, such as general purpose computers, telecommunications devices, and the like.