A liquid crystal display element including a first electrode substrate having a first transparent substrate, a first electrode formed on the first substrate, and a first alignment layer formed on the first substrate. The liquid crystal display element further includes a second electrode substrate having a second transparent substrate, a second electrode formed on the second substrate, and a second alignment layer formed on the second substrate. The liquid crystal display element also has a light modulating layer of a smectic liquid crystal material which is sandwiched between the first and second electrode substrates and which has a thresholdless voltage-transmittance characteristic and a spontaneous polarization of 120 nC/cm.sup.2 or less. Further, the polarity force component of the surface free energy of each of the first and second alignment layers is 13 dyn/cm or less.

A method for driving an antiferroelectric liquid crystal display includes the steps of causing antiferroelectric liquid crystal molecules to undergo a phase-transition into only one of positive and negative ferroelectric phases, and causing the antiferroelectric liquid crystal molecules to undergo a phase-transition into an antiferroelectric phase. The step of causing liquid crystal molecules to undergo a phase-transition into only one of positive and negative ferroelectric phases is realized by applying a selection voltage to the liquid crystal molecules. The step of causing the antiferroelectric liquid crystal molecules to undergo a phase-transition into an antiferroeletric phase is realized by applying a direct compansating voltage to the antiferroelectric liquid crystal molecules.

There is provided a driving circuit which is simple and has a small occupied area. A shift register circuit of the present invention includes a plurality of register circuits. Each of the register circuits includes a clocked inverter circuit and an inverter circuit. Both are connected in series with each other so that an output signal of the clocked inverter circuit becomes an input signal of the inverter circuit. Further, the register circuit includes a signal line by which an output signal of the inverter circuit is transmitted. Since a number of elements are connected to the signal line and parasitic capacitance is large, it has a high load. The shift register circuit of the present invention uses the fact that since the parasitic capacitance of the signal line is large, it has a high load.

A liquid crystal device of the active matrix-type having two-dimensionally arranged pixels along rows and columns is driven frame by frame. In each frame operation, a scanning selection period (T.sub.G) for each selected row is divided into a first period (t.sub.1) and a second period (t.sub.2). In t.sub.1 of a current frame (T.sub.F2), a reset pulse is applied to a pixel concerned, and the reset pulse is set to have an absolute value of voltage identical to and a polarity opposite to those of a writing pulse voltage applied to the pixel in the previous frame (T.sub.F1). Then, in t.sub.2 of the current frame (T.sub.F2), the pixel is supplied with a writing pulse depending on a prescribed display state of the pixel for the current frame. As a result, the reset period is shortened to favor a high-speed display and a higher resolution display.