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| United States Patent | 6185732 |
| Link to this page | http://www.wikipatents.com/6185732.html |
| Inventor(s) | Mann; Daniel P. (Austin, TX), Wakeland; Carl K. (Scotts Valley, CA) |
| Abstract | A processor-based device incorporating a software debug port that utilizes
a JTAG or similar standardized interface, thereby providing a software
debug communication mechanism that does not require a special bond-out
package. In one embodiment of the invention, only standard JTAG pins are
used for communications between a host platform and a target system
incorporating a target processor. In another embodiment of the invention,
the software debug port of the target processor is augmented for
higher-speed access via optional sideband signals. When used in
conjunction with an on-chip trace cache, the software debug port provides
trace information for reconstructing instruction execution flow on the
processor and is also capable of examining register contents without
halting processor operation. The software debug port alleviates many of
the packaging and clock synchronization problems confronting existing
debug solutions. |
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Title Information  |
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Drawing from US Patent 6185732 |
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Software debug port for a microprocessor |
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| Publication Date |
February 6, 2001 |
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| Filing Date |
August 25, 1997 |
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| Parent Case |
RELATED APPLICATION
This application claims priority to U.S. application Ser. No. 60/043,070,
filed Apr. 8, 1997, which is hereby incorporated by reference. |
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Title Information |
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References |
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U.S. References |
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| | Reference | Relevancy | Comments | Reference | Relevancy | Comments | 5903718
Marik
May,1999 |  Your vote accepted
[0 after 0 votes] | | 5862367
Chiao-Yen
Jan,1999 | Your vote accepted
[0 after 0 votes] | | 5861371
Wilsch-Irrgang et al.
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Tobin
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Bluhm et al.
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Baeg
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Argade et al.
Mar,1998 | Your vote accepted
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Yoshida
Sep,1996 | Your vote accepted
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Harenberg et al.
Aug,1996 | Your vote accepted
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Samsundaram et al.
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Other References |
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| | Reference | Relevancy | Comments | Pentium Processor's User Manual, vol. 3: Architecture and Programming Manual, by Inel Corporation, pp. 17-1 through 17-9, 1994.
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Apr,2007 | Your vote accepted
[0 after 0 votes] | | Embedded System Engineering Show Catalogue, by Motorola, pp. 52-54, Apr./May 1997.
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Apr,2007 | Your vote accepted
[0 after 0 votes] | | MEVB Quick Start Guide, by Motorola, pp. 3-5 and 7-2 (admitted prior to Aug. 25, 1997).
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Apr,2007 | Your vote accepted
[0 after 0 votes] | | Choosing a Cross-Debugging Methodology, Embedded Systems Programming, Aug. 1997.
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Apr,2007 | Your vote accepted
[0 after 0 votes] | | CPU 32 Reference Manual, by Motorola, pp. 7-1 through 7-13 (admitted prior to Aug. 25, 1997).
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Apr,2007 | Your vote accepted
[0 after 0 votes] | | K5 HDT, e-mail describing K5 HDT, Jan. 11, 1997.
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Apr,2007 | Your vote accepted
[0 after 0 votes] | | Advanced On-chip Debug for ColdFire Developers, Embedded Systems Programming, Apr./May 1997, pp. 52 through 54.
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Apr,2007 | Your vote accepted
[0 after 0 votes] | | IBM Corporation, "Tailorable Embedded Event Trace", Dec. 1991, pp. 259-261, IBM Technical Disclosure Bulletin, vol. 34, No. 7B, XP000282573.
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Apr,2007 | Your vote accepted
[0 after 0 votes] | | Geoff Revill, "Advanced On-chip Debug for ColdFire Developers", Embedded System Engineering, Apr./May 1997, pp. 52-54..
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