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Description  |
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BACKGROUND OF THE INVENTION
The present invention relates generally to a system and method for
synchronizing clocks in a plurality of devices connected by a
communication channel and is particularly suited for monitoring and/or
accurately controlling the relative time relationship of events occurring
proximate to one or more of the devices.
DESCRIPTION OF THE PRIOR ART
Event recorders have been used successfully for many years throughout
industry, mainly for the purposes of scheduling maintenance actions and
for post-incident analysis after an alarm or failure has occurred. For
example, if a failure occurs on a power grid that caused portions of the
grid to shut down, it would be useful to determine the sequence in which
the shut downs occurred. Additionally, in the event of a catastrophic
failure, e.g., an explosion in an oil refinery, the ability to determine
the origin of the explosion by determining the sequence of events in the
refinery could be extremely desirable. Event recorders work by
time-stamping a signal when it arrives at the recorder's buffer. The
time-stamping performed by such recorders relies upon an internal clock
that is generally only accurate to within a millisecond. Typically, when
multiple recorders are used, their internal clocks are not precisely
synchronized even in systems where the recorders are in close proximity.
Accordingly, determining the precise timing sequence of a group of events,
e.g., a power shutdown or catastrophic failure, can be difficult due to
the accumulated errors, i.e., from multiple clock and synchronization
errors. Consequently, it is generally difficult to determine the event,
and its corresponding location, which originated the sequence. In
addition, if the recorders are widely distributed, the ability to
synchronize the recorder's internal clocks typically becomes even more
difficult and even less precise. Therefore, what is needed is a system
that allows for precise synchronization between multiple event recorders
and/or control devices that is essentially independent of the geographical
distribution of such devices.
SUMMARY OF THE INVENTION
The present invention relates to a system and method for synchronizing
clocks in a plurality of devices connected by a communication channel and
is particularly suited for monitoring and/or accurately controlling the
relative time relationship of events occurring proximate to one or more of
the devices. Preferred embodiments of the present invention provide a
master control device coupled to one or more slave control devices via a
communication channel. The master control device, preferably microcomputer
based, is a controller having an internal clock that is capable of
periodic communication with the slave control devices to cause clocks
within each slave control device to essentially synchronize with the
master control device's internal clock. Furthermore, the master control
device can command and/or monitor events at each of the slave control
devices. The slave control devices, preferably microcomputer based, are
controllers having internal clocks that are responsive to messages from
the master control device. Additionally, the slave control devices include
an interface to monitor local events, e.g., through a relay contact,
and/or control external devices to cause local events to occur, e.g.,
through an output driver. Preferably, the communication channel is
implemented according to an RS-485 interface. By periodically
interrogating and monitoring the responses of each of the slave control
devices, the master control device determines the transit time, i.e.,
communication, delays to each of the slave control devices. Operating in
conjunction with this data, the master control device can then interpret
and/or adjust any event times reported by the event recorders to improve
the relative time accuracy of the event recorders as compared to a time
maintained by the master control device. Consequently, embodiments of the
present invention can achieve a relative time synchronization accuracy
between master and slave times to within 100 microseconds and preferably
100 nanoseconds or less.
Accordingly, a system of the present invention is of particular use in
determining the cause of a power shutdown or a catastrophic failure since
the precision between event recorders permits more precise analysis of the
actual order that events occurred. Additionally, slave control devices of
the present invention can be constructed that allow for the precise
synchronization of distributed control events.
A system for synchronizing clocks in a plurality of slave control devices
interconnected via a communication channel might include a master control
device, at least one slave control device, and a communication channel for
providing a bidirectional communication path between the master control
device and each of the slave control devices. In particular, the master
control device comprises master clock circuitry for maintaining an
essentially fixed frequency output and a master time, a communication
controller for periodically sending an interrogation signal to each of the
slave control devices and receiving an acknowledgment signal from each of
the slave control devices in response thereto, each acknowledgment signal
characterized by a time delay corresponding to each slave control device,
and an offset register for storing one or more time delay values
corresponding to each slave control device. Each slave control device
comprises clock circuitry for maintaining a slave time, a communication
controller for receiving the interrogation signal and sending the
acknowledgment signal in response thereto, and an event controller for
operating in association with the slave clock circuitry. The communication
channel is used for sending and receiving the interrogation and the
acknowledgment signals. Additionally, the slave communication controller
is responsive to a synchronization signal sent from the master control
device across the communication channel, used in conjunction with an
associated time delay value in the offset register, to cause the slave
time to essentially synchronize with the master time.
Such a system is particularly useful in precisely determining the time that
events occur at one or more of the slave control devices when the master
control device receives time-stamped event messages from the slave control
devices. In a preferred embodiment, the offset register contains delay
values for each of the slave control devices and adjusts the received time
stamps when each event message is received. In an alternative embodiment,
the delay value is sent from the master control device to the slave
control device where it is retained in an offset memory. The slave control
device then uses this value in synchronizing the slave time to the master
time.
In a particularly preferred aspect of the present invention, the clock and
the time of the master control device are periodically regulated by a GPS
receiver which receives a globally precise timing signal, i.e., a timing
signal that is precisely regulated to all places on the earth.
Accordingly, multiple geographically-distributed systems of the present
invention can be synchronized to a global reference, and thus to each
other.
The invention will be best understood from the following description when
read in conjunction with the accompanying drawings.
BRIEF DESCRIPTION OF THE DRAWINGS
FIG. 1 is a top level functional block diagram of a preferred system for
enabling clocks in a plurality of devices to be synchronized across a
communication channel;
FIG. 2 is an exemplary timing diagram for communications between the master
and a slave control device of the system of FIG. 1;
FIG. 3a is a functional block diagram of methods of synchronizing the
clocks of the system of FIG. 1 by alternatively compensating time values
received from the slave control devices or adjusting the time values sent
to the slave control devices in accordance with the transit time delays of
each slave control device;
FIG. 3b is a functional block diagram of an alternative implementation of
the clock circuitry portion of the slave control device of FIG. 3a;
FIG. 4a is a functional block diagram of an alternative method of
synchronizing the clocks of the system of FIG. 1 by passing a
corresponding offset value to each slave control device;
FIG. 4b is a functional block diagram of an alternative implementation of
the clock circuitry portion of the slave control device of FIG. 4a;
FIG. 5 is a timing diagram for the process of interrogating and
synchronizing the slave control devices of FIG. 1;
FIG. 6 is a block diagram of a pair of clock synchronization systems
synchronized to each other via the use of GPS receivers;
FIG. 7 shows an exemplary implementation of clock training circuitry for
adapting the clock circuitry to a clock from a GPS receiver;
FIG. 8 shows a system which employs two master control devices connected to
a plurality of slave control devices across a single communication path;
and
FIG. 9 shows an exemplary timing diagram for verifying the accuracy of the
slave time.
DESCRIPTION OF THE PREFERRED EMBODIMENTS
The present invention relates to a system and method for synchronizing
clocks in a plurality of devices across a communication channel. Preferred
embodiments of the present invention provide a master control device
coupled to one or more slave control devices, e.g., event recorders,
through a communication channel. The master control device, preferably
microcomputer based, is a controller having an internal clock that is
capable of periodic communication with the slave control devices to cause
internal clocks within each slave control device to essentially
synchronize with the master control device's internal clock. Furthermore,
the master control device can command and/or monitor events at each of the
slave control devices. The slave control devices, preferably microcomputer
based, are controllers having internal clocks that are responsive to
messages from the master control device. Additionally, the slave control
devices include an interface to monitor local events, e.g., through a
relay contact, and/or control external devices to cause local events to
occur, e.g., through an output driver. Preferably, the communication
channel is implemented according to an RS-485 interface. By periodically
interrogating and monitoring the responses of each of the slave control
devices, the master control device determines the transit time delays,
i.e., the time it takes for a message to transfer from the master control
device to each slave control device. Operating in conjunction with this
data, the master control device can interpret and/or adjust event times
reported by the event recorders to improve the relative time accuracy of
the times reported by the event recorders based on clocks in the event
recorders as compared to the time maintained by a clock in the master
control device. Consequently, embodiments of the present invention can
achieve a relative time synchronization accuracy between the master and
slave times to within 100 microseconds and preferably 100 nanoseconds or
less.
Accordingly, a system of the present invention is of particular use in
determining the cause of a power shutdown or a catastrophic failure since
the precision between event recorders permits analysis of the actual order
that events occurred. Additionally, slave control devices of the present
invention can be constructed as remotely-controlled timing modules that
allow for the precise synchronization of distributed control events, e.g.,
the actuation of a relay for powering a pump or a motor which form a part
of a process control system.
FIG. 1 shows a top level functional block diagram of a preferred system 10
for enabling clocks in a plurality of devices to be synchronized across a
communication channel. A preferred clock synchronization system 10 may
include a master control device 12, at least one slave control device 14,
and a bidirectional communication channel 16 for providing a communication
path between the master control device 12 and each of the slave control
devices 14. Preferably, the communication channel 16 is comprised of a
signal path implemented according to an RS-485 interface, a two wire
bidirectional, differential interface. However, multiple RS-422 or RS-232
interfaces or a LAN interface could also be used to implement the
communication channel 16.
A first control device, the master control device 12 for synchronizing the
clocks of a plurality of slave control devices 14 to its internal clock,
comprises clock circuitry 18 for maintaining an essentially fixed
frequency output 20 and a master time 22, a communication controller 24
for communicating with each of the slave control devices 14, and an offset
register 26, a memory for storing one or more time delay values
corresponding to the communication delay times associated with one or more
of the slave control devices 14.
The slave control devices 14 are comprised of clock circuitry 28 for
maintaining a slave time 30, a communication controller 32 for
communicating with the master control device 12, and an event controller
34, operating in association with the clock circuitry 28. The event
controller 34 records the occurrence of an event identified at signal 36.
Typically, signal 36 is indicative of an event that the system is
monitoring, e.g., a system failure such as a tripped circuit breaker or an
over temperature warning. An event time register 37 captures the slave
time 30 at the moment that signal 36 is detected. Subsequently, the value
stored in the event time register 37 is reported to the master control
device 12 (preferably in response to an inquiry from the master control
device 12). Alternatively, the controller 34 receives commands from the
master control device 12 to cause an event to occur at a time which is
stored in the event time register 37. When the value in the event time
register 37 equals the slave time 30, the event controller 34 outputs a
control signal 38 via driver output 40 to cause an event to occur, e.g,
the startup of a pump.
The master and slave time portions are comprised of circuitry that counts
forward, preferably indicating the time of day, in response to clocks in
their respective clock circuitry portions. Embodiments of the present
invention provide a method for periodically updating/correcting the slave
times 30 relative to the master time 22 and, accordingly, the slave times
30 are essentially synchronized to each other.
Communication delays occur between the master 12 and slave controllers 14
due to physical and communication processing delays. Physical delays
primarily correspond to the physical line length of the communication path
16 between the master control device 12 and each slave control device 14.
Additionally, the quality of the physical communication path, e.g.,
corrosion or resistance, can be different for each portion of the
communication path 16. Communication processing delays primarily
correspond to the hardware/software portion of the communication
controllers 32 in each of the slave control devices 14. Consequently, a
different communication delay will typically exist for each slave control
device 14. Embodiments of the present invention compensate for these
differences so that the slave time 30 in each slave control device 14
essentially corresponds to the master time 22 in the master control device
12. To accomplish this synchronization, the master control device 12
periodically interrogates the slave control devices 14 to individually
determine the corresponding communication delay for each slave control
device 14. In a preferred embodiment, each of these corresponding
communication delays is stored in the main controller 12, preferably
within the offset register 26. Alternatively, each of these delays can be
forwarded to the associated slave control device 14.
FIG. 2 shows an exemplary timing diagram for communications between the
master device 12 and a slave control device 14. In this example, it is
assumed that there is a first transit time T.sub.1 from the master control
device 12 to the slave control device 14. The first transit time is
comprised of T.sub.p1 (the physical delay) and T.sub.c1 (the communication
processing delay). Similarly, there is a second transit time T.sub.2 from
the slave control device 14 to the master control device 12 of T.sub.p2
and T.sub.c2. Accordingly, if the master control device 12 sends an
interrogation command 42 (e.g., ENQ-DEVICE) at time T.sub.0 to a selected
slave control device 14, the command will arrive at the slave control
device 14 at a time T.sub.0 +T.sub.1. The slave control device 14 then
sends a reply message 44 (e.g., an ACK, a sequence of characters including
the interrogation command and/or the time of receipt, etc.) which arrives
back at the master control device 12 at a time T.sub.0 +T.sub.1 +T.sub.2,
i.e., after a loop communication delay of T.sub.1 +T.sub.2 (i.e., T.sub.p1
+T.sub.p2 +T.sub.c1 +T.sub.c2). Typically, the physical delays are
essentially identical in both directions across the communication path 16
and the communication processing delays are similar and/or can be designed
to be similar. Accordingly, if the total loop communication delay 46 is
monitored in reference to the master clock circuitry 18 and/or the master
time 22, the loop communication delay can be measured. Then, if the loop
communication delay 46 (i.e., T.sub.1 +T.sub.2) is divided by 2, the
transit time delay 48 (i.e., T.sub.1 or T.sub.2) can be determined. Using
this transit time delay 48, various methods can be used to either actually
synchronize (e.g., within the measurement errors of the transit time
delay) the slave times 30 or compensate for the known time setting errors
for each of the slave control devices 14.
In the embodiment illustrated in FIG. 3a (referred to as embodiment A and
discussed further in reference to FIG. 9), the slave control device 14 is
periodically commanded by the master control device 12 using a clock set
command 50 (e.g., STX-TIME) to synchronize its time 30 to the master time
22. Preferably, the clock set command 50 is globally sent to all of the
slave control devices 14. Of course, when each slave control device 14
receives this command, it is now a transit time delay T.sub.Tx
(corresponding to each device) later. Thus, the slave time 30 will be slow
by a value T.sub.Tx. Accordingly, if slave control device number 1
reported that an event occurred at a slave time T.sub.S, that event would
have actually occurred at a master time T.sub.M where T.sub.M =T.sub.S
+T.sub.T1. Thus, when the master control device 12 receives a time-stamped
event message 52, it preferably adjusts the reported time, e.g., T.sub.S,
by adding a stored delay value T.sub.T1, corresponding to that slave
control device 14, from the offset register 26. Accordingly, the adjusted
reported time will be T.sub.S +T.sub.T1, which is the actual time that the
event occurred.
In another embodiment (also illustrated in FIG. 3a), the master control
device 12 adjusts its clock set command 50 to set each slave time 30
according to the calculated transit time T.sub.Tx for each slave control
device 14. Accordingly, the transit time delay T.sub.T1 for a selected
slave control device number 1 is added from the offset register 26 to the
master time T.sub.M and this adjusted value (T.sub.M +T.sub.T1) is sent to
the selected slave control device 14. Since the transit time delay
T.sub.T1 (where T.sub.T1 =T.sub.p1 +T.sub.c1) is the time that it has been
determined that it takes for a command to be received at the selected
slave control device 14, the slave time 30 will be set to a value of
T.sub.M +T.sub.T1 at a time when the actual time is T.sub.M +T.sub.T1.
Thus, the slave time 30 and the master time 22 will contain essentially
identical times. Consequently, when an event is reported from the slave
control device 14 on the communication path 16 via the time-stamped event
message 52, it will be reported with the actual time that the event
occurred.
As opposed to the first embodiment, this alternative embodiment requires
that a separate clock set command 50 be sent to each slave control device
14 since each slave control device 14 has a different transit time delay
48. As discussed further below, the clock set command 50 is actually
divided into two intervals. A first portion 50a is used to send a desired
time value to the slave device 14 and a second portion 50b is used to
instruct the slave device 14 to set its slave time 30 to the value it
received in the first portion 50a of the clock set command. While the
first portion 50a corresponds to each slave device 14, the second portion
50b need not be. Accordingly, while the first portions 50a are directed to
each slave device 14, the second portion 50b can be sent globally to all
of the slave control devices 14.
In a next embodiment (see FIG. 4a), the transit time delay value T.sub.T1
which was calculated in the master control device 12, is sent to the slave
control device 14 where it is saved in an offset memory 54. Consequently,
this value T.sub.T1 can be used in adjusting the slave time 30 at the
slave control device 14. In | | |
