 |
Description  |
|
|
BACKGROUND OF THE INVENTION
This invention relates generally to optical interfaces for data communication and, more particularly, to optical interfaces which can be manufactured and aligned in a cost-effective manner, as well as to methods for aligning such optical
interfaces.
Optical data communications technology has a number of advantages over wire technology. For example, bandwidth, data rate and response characteristics are superior to those of conventional wire technology. Optical technology is essentially
immune to RFI (radio frequency interference) and EMI (electromagnetic interference) issues that plague wire technology. Shielding as in coaxial cables is not required, allowing the overall size and weight of systems to shrink.
Optical fiber telephone lines and world wide data links are replacing the bandwidth-limited wire technology. Likewise, optical technology, particularly optical interfaces for data communications, is highly desired in a variety of applications
such as multi-component modules (MCMs), various printed circuit board (PCB) technologies, and integrated backplanes. Employing optical timing in radar transmit/receive modules to form phased array antennas is an objective in design of radar
installations.
In such systems, electro-optical devices can be employed at the point of conversion from light to electronic transmission, and vice-versa. (As employed herein the term "light" is not limited to visible light, and includes optical wavelengths
both above and below the range of visible light wavelengths). Electro-optical devices typically comprise semiconductor devices, which may be referred to as "chips" or "die." Examples of optical emitters or transmitters include light emitting diodes
(LEDs), laser diodes, and arrays of these used in automobile tail light applications. An example of an optical receiver is a photodiode. The integration of such electro-optical devices within high density interconnect structures, including the use of
adaptive lithography techniques to produce optical interconnects, is disclosed in aforementioned Wojnarowski et al., U.S. Pat. Nos. 5,562,838 and 5,737,458.
Problems associated with micro-optical alignment prevent the economical usage of optical technology. Generally, micro-optical alignment is an expensive hand tuning operation. Thus, what is limiting a great number of potential applications is
the ability to correctly align an optical die to an optical path, such as is represented by an optical fiber or by a corresponding optical die, as well as the ability to interconnect an optical assembly to a backplane.
BRIEF SUMMARY OF THE INVENTION
In an exemplary embodiment of the invention, an array of optical emitters, such as laser diodes or light emitting diodes (LEDs), for example, and an optical receiver or an end of an optical fiber are positioned within a predetermined tolerance
with reference to each other so as to establish an optical data communication path. One of the optical emitters provides the most optimum path. To search for and determine which emitter in the array of optical emitters provides the optimum optical
path, that is, achieves the best alignment, the optical emitters are individually energized in a sequence, while monitoring an output signal of the optical receiver or of the optical fiber. Thus, the laser diode array, with redundant laser emitting
cells, is energized in a scanning manner, while the receiver output signal is monitored for the best fit signal response. This may be done individually in a sequential manner, or may be done automatically as various subassemblies are assembled into a
system, and additionally upon each repair or replacement operation. The scanning and monitoring may be performed by a setup align algorithm for post-assembly. For subsequent data communications, the optical emitter determined to achieve the best
alignment is employed.
Conversely, in another exemplary embodiment of the invention, an array of optical receivers and an optical emitter are mechanically positioned within a predetermined tolerance with reference to each other to establish an optical data
communication path. One of the optical receivers corresponds to the most optimum optical path from the optical emitter. To determine which receiver in the array of optical receivers corresponds to the most optimum optical path, in other words, which
achieves the best alignment, the optical emitter is energized, and output signals of the optical receivers are measured. For subsequent data communications, the optical receiver determined to achieve the best alignment is employed.
The invention accordingly provides optical-to-electronic interfaces in a cost effective manner, and facilitates automating the alignment process between optical fibers, optical electronic assemblies, and optical connector interfaces to associated
assemblies such as backplanes. The invention may be deployed in PC card and backplane assemblies, in combination with a variety of three-dimensional stacking technologies, and in a variety of other applications where critical alignment of optical
subassemblies is important. The invention may also be employed to find related ends of long multi-fiber optical cables, such as under rivers and oceans. Labor intensive alignment operations are minimized in a manner suitable for production
applications.
BRIEF DESCRIPTION OF THE DRAWINGS
FIG. 1 is a side elevational view depicting a printed circuit board plugged into and optically coupled to a backplane array, with a portion of the backplane array cut away;
FIG. 2 is cross-sectional view taken on line 2--2 of FIG. 1;
FIG. 3 is a cross-sectional view taken on line 3--3 of FIG. 1;
FIG. 4 is a flow chart depicting a method embodying the invention;
FIG. 5 is a flow chart depicting an alternative method embodying the invention;
FIG. 6 depicts two modules which may be part of a three-dimensional stack of modules including optical interfaces embodying the invention;
FIG. 7 depicts an alternative three-dimensional stack of modules embodying the invention;
FIG. 8 depicts yet another alternative three-dimensional stack of modules embodying the invention;
FIG. 9 depicts a three-dimensional stack of modules including optical interconnect ports in the sides of the modules and a corresponding array for data communications embodying the invention; and
FIG. 10 depicts an embodiment of the invention wherein an optical connection is aligned to an end of an optical fiber.
DETAILED DESCRIPTION OF THE INVENTION
Referring now to FIGS. 1, 2 and 3, schematically illustrated is a portion of a backplane array or card rack 20 receiving a plurality of printed circuit boards (PCBs), such as representative printed circuit board 22. For electrical connections
such as power and ground, printed circuit board 22 includes finger-like electrical contacts 24 and 26 that mate with corresponding contacts of a card edge connector 28, which physically is a part of backplane array 20. Representative components mounted
to printed circuit board 22 are designated 30 and 32. Conventional structural support elements are omitted for clarity of illustration. Thus, backplane array 20 is a conventional card rack that has side shelf fixturing (not shown) for mechanical
mounting and to align the printed circuit board 22 for proper alignment of the finger-like electrical contacts 24 and 26 with contacts of card edge connector 28.
For optical data communications, not subject to bandwidth, data rate and response characteristics of the card edge connector 28 and associated finger-like contacts 24 and, 26, a two-dimensional array 36 of optical emitters 38, such as LEDs or
laser diodes, is mounted to printed circuit board 22, and positioned within a predetermined tolerance with reference to an optical receiver 40, such as a photodiode or other type of photodetector, for example, mounted to backplane array 20, so as to
establish an optical data communication path. Array 36 is large enough to accommodate misalignment of array 36 with reference to optical receiver 40 within the predetermined tolerance. Arrow 42 represents a beam of light directed from one of the
optical emitters 38 to optical receiver 40. A lens (not shown) may be employed to focus the light.
Optical emitters 38 comprising array 36 are packaged in any suitable manner. The packaging pitch of optical emitters 38 determines a minimum tolerance. LEDs and multiplexing circuitry may be included on the same water scale integration (WSI)
chip. In one embodiment, array 36 comprises an application specific integrated circuit (ASIC) chip including the optical emitters. The embodiment permits a tight packaging pitch and provides a good tolerance for alignment with the optical receiver.
High density interconnect (HDI) fabrication techniques, as are disclosed in Eichelberger et al., U.S. Pat. No. 4,783,695 and in commonly assigned Wojnarowski et al., U.S. application Ser. No. 09/258,935, filed Mar. 1, 1999, entitled "Light
Source Including an Array of Light Emitting Semiconductor Devices and Control Method," can be used instead of or in addition to an ASIC chip. This results in tighter packaging compared to the use of wire bonding. A micro PCB with wire bonds can also be
used.
For alignment purposes, optical emitters 38 are individually energized in a sequence, while the output signal of optical receiver 40 is monitored, to determine which emitter 38 in the array 36 of emitters achieves the best optical alignment,
which may be referred to as the most optimum available optical path. Thereafter, for subsequent data communications, the particular one of the optical emitters 38 determined to achieve the best alignment is employed.
A typical alignment process embodying the invention is represented in the flow chart of FIG. 4 which in one embodiment may be embodied in a controller 51 comprising a computer or microprocessor, for example. During the alignment process
individual emitters 38 of array 36 are addressed in any conventional manner, typically by multiplexing. Thus, in box 50 a first one of the emitters 38 is energized. The resultant output signal (if any) of receiver 40 is stored to initialize a variable
BEST_SIGNAL_SO_FAR, and an identification of the particular emitter 38 is stored to initialize another variable BEST_EMITTER_SO_FAR.
A loop is then entered, beginning with box 52, wherein the next emitter 38 in a sequence is energized. In decision box 54, the output signal (if any) of receiver 40 is compared with the value of the stored variable BEST_SIGNAL_SO_FAR. If the
receiver output signal is greater than the value of the stored variable BEST_SIGNAL_SO_FAR, then in box 56 the receiver 40 output signal is stored as the new value of the variable BEST_SIGNAL_SO_FAR, and the identification of the particular one of the
emitters 38 is stored as the new value of the variable BEST_EMITTER_SO_FAR. Execution then proceeds to decision box 58. If, on the other hand, in decision box 54 the receiver 40 output signal is less than or equal to the value of the variable
BEST_SIGNAL_SO_FAR, then execution proceeds directly to decision box 58.
Decision box 58 determines whether the scanning process is completed. If the last emitter 38 in the sequence has not been energized, then execution loops back to box 52. If the last emitter 38 has been energized, then decision box 60 next
determines whether a suitable optical alignment or "fit" has been achieved. Thus if in decision box 60 it is determined that the magnitude of the receiver 40 output signal stored as the value of the variable BEST_SIGNAL_SO_FAR is insufficient,
indicating that satisfactory alignment has not been achieved, then in box 62 relevant components (e.g. printed circuit board 22) are reseated, and the process begins again with box 50. If in decision box 60 it is determined that satisfactory alignment
has been achieved, then execution proceeds to box 64, where in the particular emitter 38 which achieved the best alignment as identified in the variable BEST_EMITTER_SO_FAR is employed for subsequent data communications.
The alignment process represented in FIG. 4 may be done manually by a technician, or may be accomplished as an electronically-directed automatic alignment process, either on a full time basis, or for a one-time-then-stop alignment. Alignment is
typically performed during initial assembly of a system, as well as upon each repair or replacement operation, such as when card 22 is removed and then replaced.
Moreover, in environments that are particularly prone to alignment degradation, such as where vibration or dirt is present, the automatic alignment process may be performed periodically. The automatic periodic alignment may be a dynamic process
which in effect optimizes the optical path on an essentially continuous basis. Duty cycles are such that multiplexing can be employed to transmit data between emitter energizing pulses which are for alignment purposes. Such is particularly advantageous
where vibration or other environmental factors are present.
Although array 36 of optical emitters 38 is shown mounted to printed circuit board 22 and optical receiver 40 is shown mounted to backplane 20 for optical data transmission from printed circuit board 22 to backplane 20, the relative positions of
emitter array 36 and receiver 40 may be reversed for optical data transmission from backplane 20 to printed circuit board 22, with receiver 40 in that case being mounted on printed circuit board 22 and array 36 of emitters 38 carried by backplane 20.
Further, for bi-directional optical data transmission from printed circuit board 22 to backplane 20 as well as from backplane 20 to printed circuit board 22, an array 36 of optical emitters 38 and an optical receiver 40 in that case may be mounted on
each of the printed circuit board 22 and backplane 20.
In a converse configuration embodying the invention, a single optical emitter may be employed in conjunction with an array of optical receivers. Such a configuration would be illustrated in FIGS. 1-3 by substituting for element 40 an optical
emitter such as a laser diode or an LED, and substituting for element 36 an array of optical receivers, such as photodiodes or other types of photodetectors, for example. Lensing (not shown) may be used to optimize the light path. Whether to employ a
single optical receiver and an array of optical emitters, or a single optical emitter and an array of optical receivers is determined by a variety of decision factors, such as component cost and size. As discussed above, an optical device array may be
optimized using custom ASIC (application specific integrated circuit) technology with the desired minimum pitch for alignment, with multiplexing circuitry included on the same device, if desired. Again, the relative positions of elements 36 and 40 may
be reversed, for either optical data transmission from printed circuit board 22 to backplane 20 or optical data transmission from backplane 20 to printed circuit board 22. Bi-directional optical data transmission in the converse configuration may be
accomplished by mounting an array of optical receivers and an optical emitter on each of the printed circuit board 22 and backplane 20.
FIG. 5 represents steps of an alignment process embodying the invention where the converse configuration of a single optical emitter and an array of optical receivers is employed. In one embodiment, the flowchart of FIG. 5 may be embodied in a
controller 71 comprising a computer or microprocessor, for example. The output signals of individual receivers in the array are addressed in a suitable manner, such as by multiplexing. Thus, in box 70 the emitter is energized. In box 72, the output
signal of the first receiver in a sequence is measured, and stored to initialize the variable BEST_SIGNAL_SO_FAR, and an identification of the receiver is stored to initialize the variable BEST_RECEIVER_SO_FAR.
Next, a loop is entered beginning with box 74, wherein the output signal of the next receiver in the sequence is measured. In decision box 76, this receiver output signal is compared to the value of the stored variable BEST_SIGNAL_SO_FAR. If
the receiver output signal is greater than the value of the variable BEST_SIGNAL_SO_FAR, then in box 78 the receiver output signal is stored as the new value for the variable BEST_SIGNAL_SO_FAR, and the identification of the particular receiver is stored
as the new value of the variable BEST_RECEIVER_SO_FAR. Execution then proceeds to decision box 80. If, on the other hand, in decision box 76 it is determined that the current receiver output signal is less than or equal to the value stored in variable
BEST_SIGNAL_SO_FAR, then execution proceeds directly to decision box 80.
In decision box 80, it is determined whether the loop is completed. If in decision box 80 it is determined that the last emitter has not been processed, then execution proceeds back to box 74. If, on the other hand, the last receiver output
signal has been scanned, decision box 82 next determines whether a suitable optical alignment or "fit" has been achieved. Thus if in decision box 82 it is determined that the magnitude of the receiver output signal stored as the value of the variable
BEST_SIGNAL_SO_FAR is insufficient, indicating that satisfactory alignment has not been achieved, then in box 84 relevant components, such as a printed circuit board, are re-seated, and the process begins again with box 70. If in decision box 82 it is
determined that satisfactory alignment has been achieved, then in box 86 the particular receiver identified as having the BEST_SIGNAL_SO_FAR is employed for subsequent data communications.
Similarly to what is described above with reference to FIG. 4, the alignment process represented in FIG. 5 may be performed either manually, such as by a technician, or as an electronically-directed automatic alignment process. The alignment
process may be performed upon initial assembly, subsequent repairs, or periodically, which may approach a continuous dynamic process, particularly in environments where vibration or other environmental factors are present.
Referring next to FIG. 6, represented in highly schematic form is a three-dimensional stack 90 of modules, comprising representative multi-chip modules (MCMs) 92 and 94. By way of example, each of the MCMs 92 and 94 has been manufactured
employing high density interconnect (HDI) fabrication techniques, such as are disclosed in aforementioned Eichelberger et al., U.S. Pat. No. 4,783,695. Alternatively, stack 90 may comprise stacked printed circuit boards (PCBs). Such a stack 90 can be
disassembled for repair or reconfiguration as required, and then re-assembled.
Very briefly, in systems employing an high density interconnect (HDI) structure, a ceramic substrate is provided, and individual cavities or wells having appropriate depths at the intended locations of the various chips, are prepared, or one
large cavity. Various components are placed in their desired locations within the cavities and adhered to the substrate by means of a thermoplastic adhesive layer. Alternatively the molded substrate technique disclosed in Fillion et al., U.S. Pat.
No. 5,353,498 may be employed, or the flexible structure disclosed in Eichelberger et al., U.S. Pat. No. 5,452,182.
A multilayer high density interconnect (HDI) overcoat structure is then built up to electrically interconnect the components. To begin the HDI overcoat structure, a polyimide dielectric film, such as KAPTON.RTM. polyimide film (KAPTON is a
trademark of DuPont Co.), about 0.0005 and 0.003 inch (12.5 to 75 microns) thick is pretreated to promote adhesion and coated on one side with ULTEM.RTM. polyetherimide resin (ULTEM is a trademark of General Electric Co.), or another thermoplastic, and
laminated across the tops of the chips, other components and the substrate, with the ULTEM.RTM. resin serving as a thermoplastic adhesive to hold the KAPTON.RTM. film in plate. Exemplary lamination techniques are disclosed in Eichelberger et al., U.S. Pat. No. 4,933,042.
The actual as-placed locations of the various components and contact pads thereon are typically determined by employing optical imaging techniques. Via holes are adaptively laser drilled in the KAPTON film and ULTEM adhesive layers in alignment
with the contact pads on the electronic components in their actual as-placed portions. Exemplary laser drilling techniques are disclosed in Eichelberger et al., U.S. Pat. Nos. 4,714,516 and 4,894,115, and Loughran et al., U.S. Pat. No. 4,764,485.
A metallization layer is deposited over the KAPTON film layer and extends into the via holes to make electrical contact to the contact pads disposed thereunder. This metallization layer may be patterned to form individual conductors during its
deposition, or may be deposited as a continuous layer and then patterned using photoresist and etching techniques. The photoresist is preferably exposed under a laser which, under program control, is scanned relative to the substrate to provide an
accurately aligned conductor pattern upon completion of the process. Exemplary technique for patterning the metallization layer are disclosed in Wojnarowski et al., U.S. Pat. Nos. 4,780,177 and 4,842,677, and Eichelberger et al., U.S. Pat. No.
4,835,704. Any misposition of the individual electronic components and their contact pads is compensated for by an adaptive laser lithography system as disclosed in aforementioned U.S. Pat. No. 4,835,704.
In the particular embodiment of FIG. 6, only the electronic components comprising electro-optical devices included in modules 92 and 94 for data communications are illustrated, and remaining electronic components included in modules 92 and 94 are
omitted for clarity of illustration.
Modules 92 and 94 have respective facing portions 96 and 98, which illustratively are the bottom of module 92 and the top of module 94. The distance between modules 92 and 94 is exaggerated in FIG. 6 for purposes of illustration, and mechanical
mounting details are omitted.
Upper module 92 comprises a substrate 100 having a substrate surface 102 and a cavity or well 104 containing an optical receiver 106 in the form of a semiconductor die having an active major surface 108. On active major surface 108 are a receive
sense area 110, and a received signal contact pad 112.
Cavity 104 is metallized, and has an electrically conductive metallization layer 114 extending to a contact pad 116 on surface 102 of substrate 100. Receiver die 106 has a metallized back contact 118 in electrical contact with cavity 104
metallization 114, and secured employing solder or an electrically conductive adhesive so as to establish electrical contact.
To provide electrical connections, an HDI overcoat layer 120 includes an optically transparent dielectric film 122 laminated over surface 102 of substrate 100 and active major surface 108 of receiver die 106, and adhered employing an optically
transparent thermoplastic adhesive layer 124. Optionally a window (not shown) may be formed in polyimide 122 and adhesive 124 layers over receive sense area 110. Such a window can be formed by laser ablation, with or without a mask. Suitable
techniques are disclosed in aforementioned Eichelberger et al., U.S. Pat. No. 4,894,115; Cole et al., U.S. Pat. No. 5,169,678; Komrumpf et al., U.S. Pat. No. 5,157,255; and Wojnarowski et al., U.S. Pat. No. 5,302,547.
Vias 126 and 128 are formed through dielectric film layer 122 and adhesive layers 124 in alignment with well metallization contact pad 116 and with signal contact pad 112, respectively. Conductors 130 and 132 comprising a patterned metallization
layer extend from vias 126 and 128 to representative module contact pads 134 and 136, respectively.
In a similar manner, lower module 94 comprises a substrate 140 having a substrate surface 142 and a metallized cavity or well 144 containing an optical transmitter 146 in the form of a semiconductor die having an array 148 of optical emitters
152, such as LEDs or laser diodes at an active major surface 154. On active major surface 154 is a representative electrical contact 156, which serves a control input for controlling activation of individual emitters 152 of array 148. An arrow 157
represents light (not necessarily visible light) from emitter 152 of array 148 directed towards receive sense area 110.
Optical transmitter die 146 includes a metallized back contact 158 secured to and electrically connected to a metallization layer 160 within cavity 144, and extending to a contact pad 162 on substrate 140 surface 142.
For electrical interconnections, an HDI overcoat layer 164 includes an optically transparent dielectric film 166 laminated over substrate 140 surface 142 and active major surface 154, employing an adhesive layer 168. Representative vias 170 and
172 are formed over contact pads 162 and 156, and representative electrical conductors 174 and 176 comprising a patterned metallization layer extend from vias 170 and 172 to representative module contact pads 178 and 180, respectively. Optionally a
window (not shown) may be formed in polyimide 166 and adhesive 168 layers over array 148 of emitters 152.
Upon assembly of stack 90, optical emitter array 148 and receive sense area 110 are positioned within a predetermined tolerance of each other to establish an optical data communication path. Array 148 is large enough to accommodate misalignment
of array 148 and receive sense area 110 with reference to each other within the predetermined tolerance. The sizes of emitters 152 and receive sense area 110 are preferably optimized.
During the actual alignment process, optical emitter array 148 and receive sense area 110 of FIG. 6 are operated in the same manner as is described hereinabove with reference to FIGS. 1-4 to identify which one of the individual optical emitters
152 provides the optimum data communication path for transmitting signals from lower module 94 to upper module 92. The particular emitter 152 so identified is employed for subsequent data communications.
Although array 148 of optical emitters 152 is shown on lower module 94 and optical receiver 110 is shown on upper module 92 for optical data transmission from lower module 94 to upper module 92, the relative positions can be reversed for optical
data transmission from upper module 92 to lower module 94. For bidirectional optical data transmission, an array 148 of optical emitters 152 and an optical receiver 110 can be mounted on each of the modules 92 and 94.
In a converse configuration, rather than having an array 148 of emitters 152 and a single optical receiver 110, a single emitter may be employed in combination with an array of receivers. In such converse configuration, element 110 would
comprise an optical emitter, element 148 would comprise an array of optical receivers, and the direction of arrow 156 would be reversed.
Referring next to FIG. 7, depicted is another three-dimensional stack 200 of MCMs 202, 204 and 206. Altematively, stack 200 may comprise stacked PCBs or stacked semiconductor wafers. In overview, FIG. 7 illustrates an embodiment in which the
electro-optical devices are located on the tops 208, 210 and 212 of the individual modules 202, 204 and 206, facilitated by employing optical waveguides 214 and 216 and, in addition, in which an intermediate module, such as module 204, includes both
optical transmit and optical receive elements.
In the module stack 200 of FIG. 7, the lowermost module 206 is comparable to module 94 of FIG. 6. Module 206 comprises a substrate 220 having a substrate surface 222 and a metallized cavity or well 224 containing an optical tra | | |
