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Method of manufacturing a semiconductor device    
United States Patent6294441   
Link to this pagehttp://www.wikipatents.com/6294441.html
Inventor(s)Yamazaki; Shunpei (Tokyo, JP)
AbstractTo efficiently remove catalytic elements from a crystalline semiconductor film. An Ni film is formed so as to come in contact with a semiconductor thin film of low crystallinity made of an amorphous silicon film, a microcrystalline silicon film or the like. The semiconductor thin film 12 of low crystallinity is heated at 450 to 650.degree. C. to form a crystalline semiconductor thin film in which Ni is diffused. The film is again heated at 500 to 1,100.degree. C. to crystallize amorphous components remained in the semiconductor film to form a crystalline semiconductor film of enhanced crystallinity. Next, the crystalline semiconductor film is irradiated with a laser light or an intense light to have easily diffused Ni that is locally present in the semiconductor film in a form of silicide. Catalytic elements are then selectively added in the crystalline semiconductor film to form XV-element added regions. Subsequently, heating at 500 to 850.degree. C., the catalytic elements remained in a region to be gettered are absorbed in the XV-element added regions.



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Drawing from US Patent 6294441
Method of manufacturing a semiconductor device - US Patent 6294441 Drawing
Method of manufacturing a semiconductor device
Inventor     Yamazaki; Shunpei (Tokyo, JP)
Owner/Assignee     Semiconductor Energy Laboratory Co., Ltd. (Kanagawa-ken, JP)
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Publication Date     September 25, 2001
Application Number     09/375,348
PAIR File History     Application Data   Transaction History
Image File Wrapper   Patent Term   Fees
Litigation
Filing Date     August 17, 1999
US Classification     438/486 257/E21.32 257/E21.413 257/E21.414 257/E29.293 257/E29.294 438/166 438/487
Int'l Classification     H01L 021/20 H01L 021/36
Examiner     Elms; Richard
Assistant Examiner     Wilson; Christian D.
Attorney/Law Firm     Robinson; Eric J. Nixon Peabody LLP
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Priority Data     Aug 18, 1998[JP]10-232080
USPTO Field of Search     136/258 117/8 438/166 438/486 438/487
Patent Tags     manufacturing semiconductor
   
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6156628
Ohnuma
438/486
Dec,2000

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6140165
Zhang

Oct,2000

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6077731
Yamazaki

Jun,2000

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6066518
Yamazaki
438/166
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5915174
Yamazaki
438/166
Jun,1999

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Yamazaki
438/166
Apr,1999

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5843225
Takayama

Dec,1998

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Yamazaki
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What is claimed is:

1. A method of manufacturing a semiconductor device comprising steps of:

introducing catalytic elements into a semiconductor film of low crystallinity;

applying first heat treatment to said semiconductor film of low crystallinity to form a crystalline semiconductor film including an amorphous portion;

applying second heat treatment to said crystalline semiconductor film to enhance its crystallinity;

irradiating said crystalline semiconductor film of enhanced crystallinity with a laser light or an intense light;

selectively adding a group XV element to said crystalline semiconductor film after said irradiating; and

applying third heat treatment to said crystalline semiconductor film of enhanced crystallinity to have said catalytic elements absorbed in said region added with group XV elements.

2. A method according to claim 1, wherein the first heat treatment is performed at a temperature from 450.degree. C. to 650.degree. C.

3. A method according to claim 1, wherein the second heat treatment is performed at a temperature higher than the first heat treatment.

4. A method according to claim 1, wherein the second heat treatment is performed at a temperature from 500.degree. C. to 1,100.degree. C.

5. A method according to claim 1, wherein the third heat treatment is performed at a temperature from 450.degree. C. to 850.degree. C.

6. A method according to claim 1, wherein said semiconductor film of low crystallinity is an amorphous silicon film formed by a reduced pressure CVD method.

7. A method according to claim 1, wherein said catalytic elements are one or plural kinds of elements selected from a group consisting of Ni, Fe, Co, Ru, Rh, Pd, Os, Ir, Pt, Cu, Au and Ge.

8. A method according to claim 1, wherein said semiconductor device is an active matrix type display device.

9. A method according to claim 1, wherein said semiconductor device is an EL display device.

10. A method according to claim 1, said semiconductor device is an electronic equipment selected from the group consisting of a video camera, a digital camera, a rear-type projector, a front-type projector, a head-mount display, a goggle-type display, a navigation system for vehicle, a personal computer, and a portable information terminal, a mobile computer, a cellular phone, and an electronic book.

11. A method according to claim 1, wherein said semiconductor device comprises a plurality of thin film transistors, and wherein regions of semiconductor film to which said group XV element is added include at least one of source and drain regions of said thin film transistors.

12. A method according to claim 1, wherein said group XV element is added to said semiconductor film by selectively disposing a film containing said group XV element in contact with portions of said semiconductor film.

13. A method according to claim 1, wherein said first heat treatment is performed for 4-12 hours.

14. A method according to claim 1, wherein said third heat treatment is performed for 24 hours.

15. A method of manufacturing a semiconductor device comprising steps of:

introducing catalytic elements into a semiconductor film of low crystallinity;

applying first heat treatment to said semiconductor film to form a crystalline semiconductor film;

applying second heat treatment to said crystalline semiconductor film to enhance its crystallinity after said first heat treatment;

irradiating said crystalline semiconductor film of enhanced crystallinity with a laser light or an intense light;

adding a group XV element to said crystalline semiconductor film after said irradiating; and

applying third heat treatment to said crystalline semiconductor film of enhanced crystallinity to have said catalytic elements absorbed in said region added with group XV elements.

16. A method according to claim 15, wherein said first heat treatment is performed for 4-12 hours.

17. A method according to claim 15, wherein said third heat treatment is performed for 24 hours.

18. A method according to claim 15, wherein said first heat treatment is performed to diffuse said catalytic element into said semiconductor film.

19. A method according to claim 15, wherein the first heat treatment is performed at a temperature from 450.degree. C. to 650.degree. C.

20. A method according to claim 15, wherein the second heat treatment is performed at a temperature higher than the first heat treatment.

21. A method according to claim 15, wherein the second heat treatment is performed at a temperature from 500.degree. C. to 1,100.degree. C.

22. A method according to claim 15, wherein the third heat treatment is performed at a temperature from 450.degree. C. to 850.degree. C.

23. A method according to claim 15, wherein said semiconductor film of low crystallinity is an amorphous silicon film formed by a reduced pressure CVD method.

24. A method according to claim 15, wherein said catalytic elements are one or plural kinds of elements selected from a group consisting of Ni, Fe, Co, Ru, Rh, Pd, Os, Ir, Pt, Cu, Au and Ge.

25. A method according to claim 15, wherein said semiconductor device is an active matrix type display device.

26. A method according to claim 15, wherein said semiconductor device is an EL display device.

27. A method according to claim 15, said semiconductor device is an electronic equipment selected from the group consisting of a video camera, a digital camera, a rear-type projector, a front-type projector, a head-mount display, a goggle-type display, a navigation system for vehicle, a personal computer, and a portable information terminal, a mobile computer, a cellular phone, and an electronic book.

28. A method according to claim 15, wherein said semiconductor device has a plurality of thin film transistors, and wherein regions of semiconductor film to which are added said group XV element are include at least one of source and drain regions of said thin film transistors.

29. A method according to claim 15, wherein said group XV element is add to said semiconductor film by selectively disposing a film containing said group XV element in contact with portions of said semiconductor film.

30. A method of manufacturing a semiconductor device comprising steps of:

introducing catalytic elements into a semiconductor film of low crystallinity;

applying first heat treatment to said semiconductor film to form a crystalline semiconductor film including an amorphous portion;

applying second heat treatment to said crystalline semiconductor film to enhance its crystallinity;

irradiating said crystalline semiconductor film of enhanced crystallinity with a laser light or an intense light;

adding a group XV element to said crystalline semiconductor film after said irradiating; and

applying third heat treatment to said crystalline semiconductor film of enhanced crystallinity to have said catalytic elements absorbed in said region added with group XV elements.

31. A method according to claim 30, wherein said first heat treatment is performed for 4-12 hours.

32. A method according to claim 30, wherein said third heat treatment is performed for 24 hours.

33. A method according to claim 30, wherein the first heat treatment is performed at a temperature from 450.degree. C. to 650.degree. C.

34. A method according to claim 30, wherein the second heat treatment is performed at a temperature higher than the first heat treatment.

35. A method according to claim 30, wherein the second heat treatment is performed at a temperature from 500.degree. C. to 1,100.degree. C.

36. A method according to claim 30, wherein the third heat treatment is performed at a temperature from 450.degree. C. to 850.degree. C.

37. A method according to claim 30, wherein said semiconductor film of low crystallinity is an amorphous silicon film formed by a reduced pressure CVD method.

38. A method according to claim 30, wherein said catalytic elements are one or plural kinds of elements selected from a group consisting of Ni, Fe, Co, Ru, Rh, Pd, Os, Ir, Pt, Cu, Au and Ge.

39. A method according to claim 30, wherein said semiconductor device is an active matrix type display device.

40. A method according to claim 30, wherein said semiconductor device is an EL display device.

41. A method according to claim 30, said semiconductor device is an electronic equipment selected from the group consisting of a video camera, a digital camera, a rear-type projector, a front-type projector, a head-mount display, a goggle-type display, a navigation system for vehicle, a personal computer, and a portable information terminal, a mobile computer, a cellular phone, and an electronic book.

42. A method according to claim 30, wherein said semiconductor device has a plurality of thin film transistors, and wherein regions of semiconductor film to which are added said group XV element are include at least one of source and drain regions of said thin film transistors.

43. A method according to claim 30, wherein said group XV element is add to said semiconductor film by selectively disposing a film containing said group XV element in contact with portions of said semiconductor film.

44. A method of manufacturing a semiconductor device comprising steps of:

introducing catalytic elements into a semiconductor film of low crystallinity;

applying first heat treatment to said semiconductor film to form a crystalline semiconductor film;

applying second heat treatment to said crystalline semiconductor film to enhance its crystallinity;

irradiating said crystalline semiconductor film of enhanced crystallinity with a laser light or an intense light;

selectively adding a group XV element to said crystalline semiconductor film after said irradiating; and

applying third heat treatment to said crystalline semiconductor film of enhanced crystallinity to have said catalytic elements absorbed in said region added with group XV elements.

45. A method according to claim 44, wherein said first heat treatment is performed for 4-12 hours.

46. A method according to claim 44, wherein said third heat treatment is performed for 24 hours.

47. A method according to claim 44, wherein said first heat treatment is performed to diffuse said catalytic element into said semiconductor film.

48. A method according to claim 44, wherein the first heat treatment is performed at a temperature from 450.degree. C. to 650.degree. C.

49. A method according to claim 44, wherein the second heat treatment is performed at a temperature higher than the first heat treatment.

50. A method according to claim 44, wherein the second heat treatment is performed at a temperature from 500.degree. C. to 1,100.degree. C.

51. A method according to claim 44, wherein the third heat treatment is performed at a temperature from 450.degree. C. to 850.degree. C.

52. A method according to claim 44, wherein said semiconductor film of low crystallinity is an amorphous silicon film formed by a reduced pressure CVD method.

53. A method according to claim 44, wherein said catalytic elements are one or plural kinds of elements selected from a group consisting of Ni, Fe, Co, Ru, Rh, Pd, Os, Ir, Pt, Cu, Au and Ge.

54. A method according to claim 44, wherein said semiconductor device is an active matrix type display device.

55. A method according to claim 44, wherein said semiconductor device is an EL display device.

56. A method according to claim 44, said semiconductor device is an electronic equipment selected from the group consisting of a video camera, a digital camera, a rear-type projector, a front-type projector, a head-mount display, a goggle-type display, a navigation system for vehicle, a personal computer, and a portable information terminal, a mobile computer, a cellular phone, and an electronic book.

57. A method according to claim 44, wherein said semiconductor device has a plurality of thin film transistors, and wherein regions of semiconductor film to which are added said group XV element are include at least one of source and drain regions of said thin film transistors.

58. A method according to claim 44, wherein said group XV element is add to said semiconductor film by selectively disposing a film containing said group XV element in contact with portions of said semiconductor film.
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BACKGROUND OF THE INVENTION

1. Field of the Invention

The present invention relates to a method of manufacturing a semiconductor device with the use of a crystalline semiconductor thin film. The category of a semiconductor device according to the present invention includes not only devices such as a thin film transistor and a MOS transistor but also an electronic equipment that has a semiconductor circuit consisted of these insulated-gate type semiconductor devices and an electronic equipment such as a personal computer or a digital camera which is provided with an electro-optical display device comprising an active matrix substrate (typically, a liquid crystal display device).

2. Description of the Related Art

A thin film transistor (TFT) is known at present as a semiconductor device using a semiconductor film. The TFT is utilized in various kinds of integrated circuits, especially for a switching device of a matrix circuit in an active matrix type liquid crystal display device. Further, accompanying recent progress in increasing mobility of the TFT, it has become popular to utilize the TFT as a device of a driver circuit for driving the matrix circuit. In order to utilize the TFT for the driver circuit, a semiconductor layer is necessarily a crystalline silicon film in which the mobility is higher than in the amorphous silicon film. This crystalline silicon film is called polycrystalline silicon, polysilicon, microcrystalline silicon, or the like.

A conventionally known method of forming a polycrystalline silicon film includes a method in which a polycrystalline silicon film is directly formed, and a method in which an amorphous silicon film is formed by a CVD method and is subjected to heat treatment at 600 to 1100.degree. C. for 20 to 48 hours to crystallize the amorphous silicon. A polycrystalline silicon film formed by the latter method has larger crystal grains and gives more excellent characteristics to a semiconductor device manufactured from the film.

When a crystalline silicon film is formed on a glass substrate through the latter method, the upper limitation of about 600.degree. C. is put on the process temperature for crystallization, thereby taking a lot of time in crystallizing step. The temperature of 600.degree. C. is close to the lowest temperature for crystallizing silicon, and the temperature equal to or less than 500.degree. C. cannot afford to crystallize silicon in a sufficiently short time period that is paying in terms of industrial production.

To shorten the crystallization period, the use of a quartz substrate having high distortion point and rising a crystallizing temperature to about 1,000.degree. C. are appropriate. However, a quartz substrate is very expensive as compared to a glass substrate, making it difficult to increase the area of the substrate. For instance, Corning 7059 glass that is widely used in active type liquid crystal display device has a glass distortion point of 593.degree. C., and hence the glass substrate suffers shrinkage and deformation when heated at 600.degree. C. or more for several hours. The crystallizing process is therefore required to be lowered in temperature and shortened in time period so that a glass substrate such as Corning 7059 glass can be utilized.

The technique of crystallizing with excimer laser is one of the techniques which enable the process to be lowered in temperature and shortened in time period. An excimer laser light can give, barely putting a substrate under a thermal effect, the semiconductor film an energy comparable to the energy by a thermal annealing of around 1,000.degree. C. in a short period, and can form a semiconductor film of high crystallinity. However, the excimer laser has nonuniform energy distribution on the irradiated surface, with the result that the crystallinity of the obtained crystalline semiconductor film is varied and device characteristics are also varied between TFTs.

Then, the present inventors have disclosed a technique with which the crystallizing temperature is lowered while using a heat treatment in Japanese Patent Application Laid-Open Nos. Hei 6-232059, Hei 7-321339 and others. In the technique of the publications above, a minute quantity of catalytic elements are introduced into an amorphous silicon film to which a heat treatment is subsequently applied to obtain a crystallized silicon film. Used as the elements for promoting the crystallization are elements selected from Ni, Fe, Co, Ru, Rh, Pd, Os, Ir, Pt, Cu, Au and Ge, which are invasive elements with respect to silicon.

At the crystallization in the publications above, a heat treatment causes the catalytic elements to be diffused in the amorphous silicon film to advance crystallization of the amorphous silicon film. The employment of the crystallizing technique in the publications above thus makes it possible to form crystalline silicon with a heat treatment of 450 to 600.degree. C. for 4 to 12 hours, which allows the use of a glass substrate.

The crystallization in the publications above, however, has a problem that the catalytic elements are remained in the crystalline silicon film. Remaining catalytic elements impair semiconductor characteristics of the silicon film and damage the stability and the reliability of a device fabricated from the film.

To eliminate this problem, the present applicant has investigated methods of removing (gettering) the catalytic elements from a crystalline silicon film. One of those methods (referred to as the first method) is a heat treatment in an atmosphere containing a halogen element such as chlorine. In this method, the catalytic elements in the film are gasified as halogenate.

Another method (referred to as the second method) among those is a heat treatment subsequent to selective addition of phosphorus into the crystalline silicon film. With the heat treatment, the catalytic elements are diffused into a phosphorus added region and are captured in this region.

However, the first method requires to set the heat treatment temperature to 800.degree. C. or more so that the gettering effect is obtained, and cannot use a glass substrate. On the other hand, the second method has a drawback that the treatment takes ten and several hours, though the heat temperature may be set to 600.degree. C. or less.

SUMMARY OF THE INVENTION

The present invention has been made in view of the above, and therefore an object of the present invention is to provide a method of efficiently conducting a removing step of catalytic elements when using the technique of removing the catalytic elements in the second method described above.

Another object of the present invention is to make it possible to form on a glass substrate a semiconductor device of high performance with a process temperature of 600.degree. C. or less.

Removing the catalytic elements takes time for the possible reason that, upon completion of crystallization, most catalytic elements in the crystalline silicon film are present in a bonded state with silicon, not in their atomistic form. To remove the catalytic elements from the crystalline silicon film, this bond is necessarily cut. When nickel is used as the catalytic elements for instance, they are considered to be present as nickel silicide.

For the purpose of confirming this, a silicon film crystallized by the use of nickel is etched for about 30 seconds with FPM (an etchant prepared by mixing 50% HF and 50% H.sub.2 O.sub.2 at a ratio of 1 to 1). The FPM is capable of removing nickel silicide in a short period of time, and the presence of the nickel silicide can be confirmed by observing whether or not a hole is formed by etching.

On the crystallized silicon film, holes are found to be irregularly formed by the FPM treatment. Though will be explained later, this means that nickel is locally present in the crystallized region and is bonded with silicon to form silicide in this nickel-localized portion.

Then, the present invention adopts as the principal construction a process in which bond between catalytic elements and semiconductor is cut by irradiating a crystallized semiconductor film with a laser light or infrared light to diffuse the catalytic elements in their atomistic form. This construction makes the catalytic elements easy to diffuse in a semiconductor film, for which the removing step of the catalytic elements is expected to be lowered in temperature and shortened in time.

The present invention developed to attain the above-described object is characterized by having as its main construction a process comprising:

an introducing step of introducing catalytic elements into a semiconductor film of low crystallinity;

a first heat treatment step of applying heat treatment to the semiconductor film of low crystallinity;

a second heat treatment step of applying heat treatment to the semiconductor film that has been subjected to the first heat treatment;

a catalyst-removing (gettering) step of applying heat treatment to the semiconductor film that has passed through the second heat treatment to remove the catalytic elements in the film; and

a light annealing step of irradiating with a laser light or an intense light the semiconductor film that has passed through the second heat treatment, the step being put somewhere between the second heat treatment step and the catalyst-removing step.

In the introducing step above, the semiconductor film of low crystallinity is either a noncrystalline semiconductor film that does not assume crystallinity or a semiconductor thin film having crystallinity but almost no crystal grain of 100 nm order or higher. To be concrete, the semiconductor film of low crystallinity refers to an amorphous semiconductor film and a microcrystalline semiconductor film. The microcrystalline semiconductor film is a semiconductor film in which an amorphous forms a mixed phase together with a microcrystal containing crystal grains as large as several to several tens nm.

More specifically, the semiconductor film of low crystallinity includes an amorphous silicon film, a microcrystalline silicon film, an amorphous germanium film, a microcrystalline germanium film and an amorphous Si.sub.1 Ge.sub.1-x (0<.times.<1), and those semiconductor films are formed through a chemical vapor phase method such as a plasma CVD method or a reduced pressure CVD method.

The catalytic elements are elements that have a function of promoting crystallization of semiconductor, in particular, silicon, and usable element are one or plural kinds of elements selected from Ni, Fe, Co, Ru, Rh, Pd, Os, Ir, Pt, Cu, Au and Ge which are metal elements invasive with respect to silicon.

The catalytic elements above may be introduced by adding the catalytic elements into the semiconductor film of low crystallinity, or by forming a film containing the catalytic elements so as to come in contact with the upper or lower surface of the semiconductor film of low crystallinity.

In the former method, a semiconductor film of low crystallinity is formed and then the catalytic elements are added into the semiconductor film of low crystallinity through an ion implantation method, a plasma doping method or the like.

In the latter method, the film containing the catalytic elements may be formed through, for example, deposition utilizing a CVD method, a sputtering method, etc., or through coating with a solution containing the catalytic elements by the use of a spinner. Formation of the film containing the catalytic elements may be performed either before or after formation of the semiconductor film of low crystallinity. If the semiconductor film of low crystallinity is formed first, the film containing the catalytic elements is formed in close contact with the upper surface of the semiconductor film and, when that formation order is reversed, the film containing the catalytic elements is formed in close contact with the lower surface of the semiconductor film. In the present invention, the term "be in close contact" refers to, not restricted to a case where the semiconductor film is literally in close contact with the catalytic-element film, a case where an oxide film or a natural oxide film with a thickness of about 10 nm is sandwiched between those films as long as the catalytic elements can be diffused in the semiconductor film.

When Ni is used as a catalytic element in the introducing step, for instance, it is appropriate to form an Ni film or an Ni silicide film through the deposition.

Alternatively, when the coating is employed, a usable solution may be a solution having a solute of nickel salt such as nickel bromide, nickel acetate, nickel oxalate, nickel carbonate, nickel chloride, nickel iodide, nickel nitrate and nickel sulfate, and a solvent consisted of water, alcohol, acid and ammonia, or may be a solution having a solute of the nickel element and a solvent selected from a group consisting of benzene, toluene, xylene, carbon tetrachloride, chloroform and ether. Nickel does not need to be dissolved completely, an emulsion-like material in which nickel is dispersed through a medium may also be used.

Alternatively, a method may be employed in which nickel as a simple substance or a nickel compound is dispersed in a solution for forming an oxide film to form an oxide film containing nickel. The OCD (Ohka Diffusion Source) that is a product of Tokyo Ohka Kogyo, Inc., may be used as such a solution. With the employment of this OCD solution, a silicon oxide film is readily formed by coating with the solution a surface where the film is to be formed and then by baking it at about 200.degree. C. The same may be applied to the case where other catalytic elements are used.

In respect of how to introduce the catalytic elements, coating has advantages, over the doping or the film formation of Ni by a sputtering method. The coating is easiest in adjustment of concentration of the catalytic elements in the semiconductor film of low crystallinity, and simplifies the process.

The first heat treatment step mentioned above is a step provided for diffusing the catalytic elements in the semiconductor film of low crystallinity. When the heat treatment is applied to the semiconductor film of low crystallinity to which the catalytic elements have been introduced, the catalytic elements immediately invade the inside of the semiconductor film to be diffused. The catalytic elements then exert, while being diffused, catalytic action on molecular chains in an amorphous state to crystallize the semiconductor film of low crystallinity.

This catalytic action is disclosed by the present applicant in Japanese Patent Application Laid-Open Nos. Hei 06-244103, Hei 06-244104 and others. Since the catalytic element is of an invasive atom with respect to silicon, silicon that is in contact with the catalytic element is bonded to the catalytic element to form silicide. It has been found that silicide then reacts with the silicon bond in an amorphous state to progress the crystallization. This is because the distance between the atoms of the catalytic element and of silicon has a very close value to that of the distance between atoms in single crystal silicon. The distance between Ni--Si has the closest value to that of the distance between single crystal Si--Si, and is shorter by about 0.6% of the latter.

When schematizing the reaction for crystallizing an amorphous silicon film with the use of nickel as a catalytic element, it will be expressed by the following reaction formula:

Si[a]-Ni (silicide)+Si[b]-Si[c](amorphous).fwdarw.Si[a]-Si[b](crystalline)+Ni -Si[c](silicide)

In the reaction formula above, the indicators [a], [b] and [c] indicate positions of Si atoms.

The reaction formula shows that distance between Si[a] and Si[b] is almost equal to the distance in a single crystal because an Ni atom in silicide is substituted by an Si[b] atom of silicon in an amorphous portion. It also shows that Ni causes crystals to grow while being diffused in the semiconductor film of low crystallinity. Further shown by the formula is that, upon completion of the crystallizing reaction, Ni is locally present at the termination of the diffusion (or at the front of the crystal growth) in a bonded state with Si. In other words, Ni in a form of silicide expressed as NiSi.sub.x is irregularly distributed in the film after crystallization. The presence of this silicide may be confirmed as holes by applying the FPM treatment to the film after crystallization, as mentioned above.

Incidentally, it has been found that the energy for promoting this crystallization reaction is appropriately given through heating in a heating furnace at a temperature of 450.degree. C. or more. The upper limitation of the heating temperature is set to 650.degree. C. This is set in consideration for preventing crystallization of the amorphous semiconductor film from being progressed at a portion where the film does not react with the catalytic elements. If the film is crystallized at the portion where it does not react with the catalytic elements, the catalytic elements cannot be diffused in that portion, so that crystal grains cannot be increased in size and variation takes place in the grain size thereof.

The second heat treatment above has an object of enhancing and improving the crystallinity of the crystalline semiconductor film that has been crystallized by the catalytic elements.

The crystalline semiconductor film formed by the first heat treatment has defects in crystal grains and an amorphous portion remained. Therefore in the present invention, a heat treatment is again performed to crystallize the amorphous portion and to eliminate the defects in crystal grains. This time, the heat temperature is set higher than in the first heat treatment, specifically to 500 to 1,100.degree. C., and preferably 600 to 1,100.degree. C. It is needless to say that, upon practicing the process, the upper limitation of the temperature is determined depending on the heat resistance temperature of a substrate.

At this step, an excimer laser light may be irradiated instead of the heat treatment. However, the excimer laser has inevitable variation in irradiation energy as mentioned above, involving a fear that the crystallization of the amorphous portion varies. Particularly, under this state where every film has different distribution of the amorphous portion, there is a fear that variations take place not only in characteristics between devices in one semiconductor device but also in characteristics between semiconductor devices.

For that reason, it is desirable to apply without fail a heat treatment after the crystallizing step and before irradiation with an excimer laser light so that the amorphous portion is crystallized and the defects are reduced. Accordingly, it is important to use a heat treatment to improve the crystallinity when excimer laser is used at the subsequent light annealing step.

Known as a heating method equivalent to the heat treatment in a heating furnace is the RTA method in which infrared light that peaks at the wavelength of 0.6 to 4 .mu.m, preferably 0.8 to 1.4 .mu.m is irradiated for several tens to several hundreds seconds. A semiconductor film that has high absorption coefficient with respect to infrared light is heated up to 800 to 1,100.degree. C. in a short period of time by irradiation with infrared light. However, in the RTA method, irradiation takes longer time than irradiation with excimer laser so that a substrate readily absorbs the heat, and hence attention should be given to occurrence of deflection when using a glass substrate.

One of the objects of the present invention is to remove (getter) the catalytic elements that are locally present in the crystallized semiconductor film. In the present invention, a group XV element is used for gettering of the catalytic elements. Here, the group XV element includes P, As, N, Sb and Bi. The element having the highest gettering ability is P and the second highest is Sb.

Enumerated as a removing method of the catalytic elements according to the present invention are a method in which a group XV element is selectively added in the crystalline semiconductor film to form a region (film) containing the group XV element, and a heat treatment is applied thereto to have the catalytic elements absorbed in the region containing the group XV element, and a method in which a film containing a group XV element is formed so as to come in contact with the crystalline semiconductor film and is subjected to a heat treatment so that the semiconductor film contains the group XV element.

In the former method, the region containing a group XV element may be formed in the crystalline semiconductor film through as in introduction of the catalytic elements to the semiconductor film of low crystallinity, a vapor phase method such as a plasma doping method and an ion implantation method.

In the latter method, the film containing a group XV element may be a silicon film or a silicon oxide film that is made to contain a group XV element, which is formed through deposition utilizing a CVD method or a sputtering method, or through coating. A microcrystalline silicon film containing P for forming NI junction, a PSG film and the like typically exemplify the film.

The concentration of a group XV element in the region added with a Group XV element or in the film containing a group XV element is ten times the concentration of the catalytic elements remained in the semiconductor film. In the crystallizing method of the present invention, the catalytic elements are remained in 10.sup.18 to 10.sup.20 atoms/cm.sup.3 order, and the concentration of a group XV element is therefore set to 1.times.10.sup.19 to 1.times.10.sup.21 atoms/cm.sup.3.

A heat treatment is conducted to remove (to have gettered) the catalytic elements. With the heat treatment, the catalytic elements are diffused in the region added with a group XV element or in the film containing a group XV element, and are bonded there with the group XV element to be inactivated. Thus, this catalyst-removing step may be regarded as a step of having the catalytic elements absorbed (gettered) in the region added with a group XV element or into the film containing a group XV element.

It has been proved that, when a croup XIII element is added as well as a group XV element, the region or film in which the catalytic elements are absorbed can obtain higher removing effect than in the case where merely a group XV element is added. When the group XIII element is additionally used, the concentration of a group XIII element is 1.3 to 2 times as high as the concentration of a group XV element. The group XIII element includes B, Al, Ga, In and Ti.

Through the catalyst-removing step of the present invention, it is possible to obtain a crystalline semiconductor region where the concentration of the catalytic elements is reduced down to 5.times.10.sup.17 atoms/cm.sup.3 or less (preferably, 2.times.10.sup.17 atoms/cm.sup.3 or less).

Under the present circumstance in which the lower limit of detection by the SIMS (secondary ion mass spectroscopy) is about 2.times.10.sup.17 atoms/cm.sup.3, a concentration lower than that cannot be measured. However, it is assumed that the catalytic elements may be reduced at least to 1.times.10.sup.14 to 1.times.10.sup.15 atoms/cm.sup.3 by performing the removing step shown in this specification.

In the present invention, in order to lower the temperature and shorten the time in the catalyst-removing step, the crystalline semiconductor film is irradiated with a laser light or an intense light prior to this heat treatment. By this irradiation with light (light annealing), the film shifts to a state where the catalytic elements that are locally present in the crystalline semiconductor film are easily diffused.

As described above, the catalytic elements that are distributed in the semiconductor film in a bonded state with semiconductor molecules, for example, in a form of NiSi.sub.x, are returned to its atomistic state when the Ni--Si bond is cut by light annealing energy, or enter into a state where remained catalytic elements is easy to diffuse in the crystalline semiconductor film when Ni--Si bond energy is reduced by light annealing energy.

The light annealing of the present invention may decrease energy required to diffuse the catalytic elements, so that the catalytic elements are diffused by heating at 500.degree. C. or more and also the treatment time is shortened. Further, an effect may be expected in reduction of an area of the region or film in which the catalytic elements are absorbed, leading to enlargement of a portion where a device may be formed. The upper limitation of the heating temperature in the catalyst-removing step is about 850.degree. C., a temperature at which the group XV element in the region or film in which the catalytic elements are absorbed does not move.

In the light annealing step, it is appropriate that the semiconductor film is irradiated with light confining to a portion to be a semiconductor layer that constitutes a semiconductor device. The portion should include at least a region where a depletion layer of this semiconductor layer is formed (a channel formation region).

For a light source used in the light annealing, excimer laser having a wavelength of 400 nm or less may be employed. A usable excimer laser may be, for example, KrF excimer laser (248 nm in wavelength), XeCl excimer laser (308 nm in wavelength), XeF excimer laser (351 nm, 353 nm in wavelength), and ArF excimer laser (193 nm in wavelength). Also, XeF excimer laser (483 nm in wavelength) can be used. An ultraviolet lamp may be used. Alternatively, an infrared lamp such as a xenon lamp and an arc lamp may be used. Also may be used an excimer laser light of pulse oscillation type.

BRIEF DESCRIPTION OF THE DRAWINGS

In the accompanying drawings:

FIGS. 1A to 1G are views showing a manufacturing process according to Embodiment 1;

FIGS. 2A to 2F are sectional views showing a manufacturing process according to Embodiment 2;

FIGS. 3A to 3D are sectional views showing a manufacturing process according to Embodiment 3;

FIG. 4 is a plan view showing a CMOS circuit of Example 1;

FIGS. 5A to 5F are sectional views showing a manufacturing process of TFTs;

FIGS. 6A to 6D are sectional views showing the manufacturing process of TFTs;

FIGS. 7A to 7E are sectional views showing a manufacturing process of TFTs according to Example 2;

FIGS. 8A to 8D are sectional views showing the manufacturing process of TFTs;

FIG. 9 is a perspective view of an active matrix substrate of Example 3;

FIGS. 10A and 10B are top views showing a pixel matrix circuit and a CMOS circuit, respectively;

FIG. 11 is a sectional view of an active matrix substrate;

FIGS. 12A and 12B are perspective views each showing appearance of a liquid crystal display device of Example 4;

FIGS. 13A to 13F are structural views showing electronic equipments in Example 6; and

FIGS. 14A to 14D are structural views showing electronic equipments in Example 6.

DESCRIPTION OF THE PREFERRED EMBODIMENTS

Description will be made of Embodiments of the present invention with reference to FIGS. 1A to 3D.

Embodiment 1

This embodiment will be described with reference to FIGS. 1A to 1G.

As shown in FIG. 1A, a substrate 10 is prepared and an under film 11 is formed on the surface thereof. A substrate that may be used as the substrate 10 includes: insulating substrates such as a glass substrate, a quartz substrate and a ceramic substrate; a single crystal silicon substrate; and further, conductive substrates such as a stainless substrate, a Cu substrate and a substrate made of a metal material having high melting point, e.g., Ta, W, Mo, Ti, Cr, or made of an alloy of those bases (for example, a nitrogen based alloy).

The base film 11 has