A capacitor-averaging pipeline analog-to-digital converter has a plurality of stages. Each of the plurality of stages has a first switched capacitor circuit and a second switched capacitor circuit parallel with the first switched capacitor circuit. A corresponding method is also disclosed.

The invention relates to a color picture camera (1, 31, 41) with a sensor (2) having a surface to image color pictures, which pictures can be converted into electrical signals, a red component of the color picture generating an electrical red value signal (R), a green component of the color picture generating an electrical green value signal (G), and a blue component of the color picture generating an electrical blue value signal (B), which signals are supplied to a parallel/serial converter and an amplifier circuit (42) for a white compensation and a brightness compensation. According to the invention, the amplifier circuit includes a two-stage amplifier (43, 44) with a first amplifier stage (43) for a fine compensation and a second amplifier stage (44) for a coarse compensation.

Capacitance on a readout line is varied while receiving a signal, from a light sensing pixel or other sensing element through the line. Capacitance can be varied in accordance with a readout characteristic of the pixel, such as color sensed, conversion efficiency, or readout signal range. For example, a CMOS color image sensing array with pixels in an RGB Bayer pattern can include, for each column, a variable capacitance component with parallel switchable capacitors for signal sampling and readout sampling. The capacitors can all have equal values, or can be scaled in a binary format. The variable capacitance component can also include a constant capacitor. A controller can switch the capacitors to obtain capacitances that provide color equalization, and can use light level as well as pixel color for fine tuned color equalization. Sampled values from the capacitances can be provided in sequence to a readout amplifier at the beginning of a readout path to maintain signal-to-noise ratio. The readout amplifier's gain can depend on its input capacitance, which is determined by the switched capacitors to obtain color equalized output. In addition, the readout amplifier can block the effect of parasitic capacitance from column select switches. A second amplifier can perform further color equalization through variable gain. After an array is constructed, capacitor selection data can be obtained for each color and light level and used to program the controller.

A linear pixel-array processing systems uses a combination of digital and analog signal processing techniques to calibrate the gain and offset of each pixel in the analog domain. A plurality of fixed gain and offset values are applied in the analog domain to adjust the gain and offset of each pixel at high speeds (on the order of 25-50 MHz). By adjusting the gain and offset in the analog domain, the dynamic range of pixel conversion is improved such that the conversion range is fully utilized (over 90%, on the order of 95%-99%). The gain and offset values are determined with an algorithmic calibration routine that corrects for non-ideal effects in the signal path. A single processing channel can be multiplexed to process multiple pixel arrays to provide for a cost effective solution. In higher speed systems, the single processing channel can be extended to multiple processing channels for improved throughput.

There is a need for providing a variable amplifier circuit suited for a semiconductor integrated circuit and a high-performance camera preprocessing LSI using the variable amplifier circuit. At first timing, a first input capacitor acquires a first signal. An amplifier circuit amplifies a second signal acquired to the second input capacitor according to a gain corresponding to a capacity ratio between the second input capacitor and a feedback capacitor composed of a variable capacitor device. At second timing, the second input capacitor acquires a second signal. The amplifier circuit amplifies the first signal according to a gain corresponding to a capacity ratio between the first input capacitor and the feedback capacitor. A variable gain amplifier circuit interleavingly amplifies the first signal and the second signal in synchronization with the first timing and the second timing.