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Semiconductor manufacturing method and semiconductor manufacturing apparatus
   
Document Number
US Patent 6368049
Issued Date
April 9, 2002
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Abstract
Particles are prevented from clinging to the back of a water in the notch alignment of the wafer, and the problems encountered when a plurality of wafers were aligned all at once are solved. Three support poles 105 are erected on a turntable 103. The substrate outer periphery 104b of wafers 104 is supported by the tapered portions of support pins 107 protruding from the support poles 105. The turntable 103 is driven by a single motor 106, and all of the wafers 104 are rotated at once. During rotation, the notches 104a of al the wafers 104 are detected by an optical sensor 116 provided to a sensor pole 117, and the angular position thereof is stored. The wafers 104 are rotated an the basis of the angular position data, and notch alignment is performed successively, starting with the bottom wafer 104. The wafers 104 that have undergone notch alignment are successively picked up by the pick-up support pins 111 of pick-up poles 110, and are retracted from the support poles 105 that are rotating for notch alignment. Once all of the alignments have been completed, the retracted wafers 104 are returned to the support pins 107.
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Semiconductor manufacturing method and semiconductor manufacturing apparatus - US Patent 6368049 Drawing
Drawing from US Patent 6368049
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Number of Claims:
18
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Owner
Published
April 9, 2002
Application Number
09/544,463
Filed
April 7, 2000
US Classification
414/783   414/331.01
Int'l Classification
H01L   21/67   (20060101)   H01L   21/68   (20060101)  
Assistant Examiner
Attorney/Law Firm
Priority Data
Apr 07, 1999 [JP] 11-099562
USPTO Field of Search
414/331.01   414/331.04   414/783   414/936   414/941   414/754.2  
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