An ADC implemented according to an aspect of the present invention contains a non-zero bit stage followed by a zero-bit stage. The non-zero bit stage generates a sub-code, which is used in generating a digital code corresponding to an input analog signal, and the zero-bit stage does not provide any such sub-codes. Such a feature may be attained by using a gain amplifier provided according to another aspect of the present invention. The gain amplifier contains a main-amplifier which operates as a zero bit stage, and is also used by the non-zero bit stage. The same capacitance value may be maintained between the input terminal and output terminal of the main-amplifier to implement the zero bit stage, which enables the main-amplifier to be implemented with a low gain.

A circuit with a common-mode dual output includes a feedback circuit connected to alternate the states of the dual output between an average output level and a desired common-mode level. The difference between the average and desired levels is proportional to a signal offset level. An impedance matching circuit is connected to the feedback circuit to adjust the signal offset level.

An amplifier sharing technique in an analog to digital converter (ADC) in which a cascaded combination of a pre-amplifier and main amplifier is used to provide the required amplification for a first stage, and only the main amplifier is used to provide the amplification for the second stage. Switches and capacitors are used in conjunction such that the sampling and feedback capacitors of the first stage are connected across the cascaded combination in a first phase, and sampling and feedback capacitors of the second stage are connected across the main amplifier in a second phase. By appropriate choice of parameter values for various components, the second poles due to the pre-amplifier may be located at the higher frequency ranges obtaining the required unity gain bandwidth (UGB) without Miller compensation and/or additional gain.

A wireless transmission circuit enabling modulation of RF power amplification includes a signal processing circuit for outputting a signal that is modulated and then amplified at a cascade power amplification circuit including a plurality of power stages, and is then wirelessly transmitted to and received by a computer system. The wireless transmission circuit includes at least a power-setting unit for controlling a specific number of power stages included in the power amplification circuit to be used in the power amplification of the modulated signal. When a wireless input device employing the wireless transmission circuit is used within a short transmission distance, a lower transmission power is selected via the power-setting unit; and when the wireless input device is used at a long transmission distance, a higher transmission power may be selected to achieve the remote transmission. The wireless input device could therefore have extended battery life.

A comparator includes a circuit which provides a plurality of common-mode difference signals in response to differential input signals. The circuit provides a common-mode feedback signal in response to the plurality of common-mode difference signals. The common-mode feedback signal is used to drive the common-mode level of an amplifier to a desired value.