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Document Number
US Patent 6411652
Issued Date
June 25, 2002
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Abstract
A method of comparing a current block in a current frame to a plurality of background blocks in a preceding frame. Each block includes a matrix of data values arranged in a given number of columns. The method uses a processor which has a plurality of computational registers, each register capable of receiving a number of the data values at least equal to the given number. The data values are loaded from a memory beginning at an address in the memory evenly divisible by the given number. The method includes storing the preceding frame in the memory beginning at an address that is divisible by the given number with a predetermined remainder, loading at least some of the data values of the current block into one or more of the plurality of registers, loading at least some of the data values of one or more of the background blocks into another one or more of the plurality of registers, and comparing the background blocks to the current block using the registers.
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Number of Claims:
21
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Published
June 25, 2002
Application Number
09/177,756
Filed
October 23, 1998
US Classification
375/240.16   375/240.13 375/240.15
Int'l Classification
H04N   7/26   (20060101)  
Examiner
Attorney/Law Firm
USPTO Field of Search
375/240.13   375/240.14   375/240.15   375/240.16   375/240.17  
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