A multilayer cell is provided that comprises two solid, nonporous current collectors, two porous electrodes separating the current collectors, a porous separator between the electrodes and an electrolyte occupying pores in the electrodes and separator. A thermoplastic vinyl acetate polymer or thermoplastic polyamide is applied to the multilayer structure; and pressure or heat is applied to seal layers of the cell by means of the thermoplastic vinyl acetate polymer or thermoplastic polyamide to form the ultracapacitor.
A multilayered structure array has narrow pitches by making thinner coatings for insulating internal electrode layers from side electrodes and the productivity of the multilayered structure array is improved. The multilayered structure includes: a first internal electrode layer; a piezoelectric layer formed on the first internal electrode layer; a second internal electrode layer formed on the piezoelectric layer; a first coating formed on an end surface of the first internal electrode layer in a first side surface region of the multilayered structure and containing one of metal oxide, metal nitride, metal fluoride and metal sulfide in at least one part thereof; and a second coating formed on an end surface of the second internal electrode layer in a second side surface region of the multilayered structure and containing one of metal oxide, metal nitride, metal fluoride and metal sulfide in at least one part thereof.
A method of manufacturing a capacitor stack for a flat capacitor includes sequentially stacking a plurality of capacitor layers on top of each other such that each one of the plurality of capacitor layers is, in turn, a top layer of the capacitor stack, and continually applying a compression force between a bottom layer of the capacitor stack and the top layer of the capacitor stack until all of the plurality of capacitor layers have been placed.
A method of manufacturing a capacitor stack for a flat capacitor includes sequentially stacking a plurality of capacitor layers on top of each other such that each one of the plurality of capacitor layers is, in turn, a top layer of the capacitor stack, and continually applying a compression force between a bottom layer of the capacitor stack and the top layer of the capacitor stack until all of the plurality of capacitor layers have been placed.
The present subject matter includes a capacitor stack having a plurality of cathode layers, and a plurality of anode layers. Separator paper is shaped and sized to separate the anode and the cathode and prevent breakdown. The capacitor stack is compact, and is adapted for use in compact devices. For example, the capacitor stack is adapted for use in cardiac rhythm management devices which are implanted.
In various embodiments, the present subject matter includes a capacitor stack having a first substantially planar electrode having a first unetched portion, and a first aperture extending through the first substantially planar electrode and defined by material at least partially including the unetched portion. Also, the present subject matter includes a second substantially planar electrode having a second unetched portion. The present subject matter includes embodiments wherein the first substantially planar electrode and the second substantially planar electrode are in alignment such that an unetched portion of the first aperture is at least partially adjacent an unetched portion of the second electrode defining a connection surface. The present subject matter additionally includes embodiments wherein the first electrode and the second electrode are connected along the connection surface.
