An analog to digital converter (ADC) circuit suitable for processing serial data at a fast rate includes a clock control block for receiving a reference strobe signal REF_STB, a reference clock signal REF_CLK, and number of bit control signals CONT.sub.-- 1, CONT.sub.-- 2. The clock control block outputs first and second internal clock signals CLK_A, and CLK_B, and a forwarding direction control signal CONT.sub.-- 3. The ADC circuit also includes a parallel analog to digital converter for receiving and converting analog signal into a parallel digital data synchronously with the first internal clock signal CLK_A. A parallel to serial transform logic control block then transforms the parallel digital data into serial digital data synchronously with the second internal clock signal CLK_B.
An analog-to-digital signal conversion system includes two analog-to-digital converters having equal inherent frequencies. The analog-to-digital converters share common input channels, and the output of each analog-to-digital converter is directed to a multiplexer that is arranged on a programmable logic device. The converters alternate in the sampling of analog signals, thus delivering digital signals to the multiplexer at a higher speed than either analog-to-digital converter could do on an individual basis. The multiplexer delivers the digital signals to slots of a memory mailbox, where the slots correspond to the input channels of each converter.
According to one embodiment of the invention, a method of sampling a signal is provided. The method includes receiving over a signal path an analog signal generated using a first clock signal by a first device. The method also includes sampling the analog signal using a second clock signal to generate a numeric representation of at least a portion of the analog signal. The frequencies of the first and the second clock signals differ from one another by a known amount. The method also includes communicating over the signal path the numeric representation for receipt by a second device. The signal path experiences loading and at least a majority of the loading of the signal path occurs between the sampler and the second device.