A thin film transistor has a laminated structure comprising a semiconductor thin film, a gate insulator formed in contact with the surface of the semiconductor thin film, and a gate electrode disposed on the face side of the semiconductor thin film, and is formed on a substrate in a predetermined plan view shape. To fabricate the thin film transistor, first, a first step is carried out in which a semiconductor thin film having a clean surface is formed over the substrate. Next, a second step is carried out in which a protective film PF is formed so as to cover the clean surface of the semiconductor thin film. Further, in a third step, the semiconductor thin film is patterned together with the protective film PF according to the predetermined plan view shape of the thin film transistor. Thereafter, a fourth step is carried out in which the protective film PF is removed from the upper side of the patterned semiconductor thin film to expose a clean surface. Subsequently, a fifth step is carried out in which a gate insulator is formed in contact with the exposed surface of the semiconductor thin film.

There is provided a semiconductor manufacturing method capable of sufficiently reducing catalytic element in a crystalline silicon film and also increasing the area of the crystalline silicon film to be left on the substrate. A catalytic element for accelerating the crystallization is introduced into an amorphous silicon film on a substrate, and a first heat treatment is performed to crystallize the amorphous silicon film into a crystalline silicon film. A mask layer is provided on the surface of the crystalline silicon film, the mask layer having an opening passing thicknesswise through the mask layer. Further thereon, a sacrifice film is formed so as to continuously cover the surface of the mask layer and an opening-correspondent portion of the crystalline silicon film. A getter element for gettering the catalytic element is introduced into the sacrifice film and the opening-correspondent portion of the crystalline silicon film. A second heat treatment is performed, by which the catalytic element is gettered from the crystalline silicon film to the sacrifice film through the opening.

A mask is formed selectively on a crystalline silicon film containing a catalyst element, and an amorphous silicon film is formed so as to cover the mask. Phosphorus is implanted into the amorphous silicon film and the portion of the crystalline silicon film which is not covered with the mask. The silicon films are then heated by rapid thermal annealing (RTA). By virtue of the existence of the amorphous silicon film, the temperature of the crystalline silicon film is increased uniformly, whereby the portion of the crystalline silicon film covered with the mask is also heated sufficiently and the catalyst element existing in this region moves to the phosphorus-implanted, amorphous portion having high gettering ability. As a result, the concentration of the catalyst element is reduced in the portion of the silicon film covered with the mask. A semiconductor device is manufactured by using this portion.

Disclosed is a method of fabricating a thin film transistor in which, in order to control the concentration of metal catalysts remaining on a polycrystalline silicon layer when an amorphous silicon layer formed on an insulating substrate is crystallized into the polycrystalline silicon layer by a super grain silicon (SGS) crystallization method, the substrate is annealed so that a very small amount of metal catalyst is adsorbed or diffused into a capping layer, and then a crystallization process is carried out, thereby minimizing the concentration of the metal catalysts remaining on the polycrystalline silicon layer, as well as forming a thick metal catalyst layer. The method includes preparing an insulating substrate; sequentially forming an amorphous silicon layer, a capping layer, and a metal catalyst layer on the substrate; first annealing the substrate to adsorb or diffuse metal catalysts into the capping layer; removing the metal catalyst layer; second annealing the substrate to crystallize the amorphous silicon layer into a polycrystalline silicon layer by means of the metal catalyst; and removing the capping layer. Thus, with the method of fabricating the thin film transistor of the present invention, it is possible to minimize the concentration of the metal catalysts remaining on the polycrystalline silicon layer, as well as to form a thick metal catalyst layer.

A mask is formed selectively on a crystalline silicon film containing a catalyst element, and an amorphous silicon film is formed so as to cover the mask. Phosphorus is implanted into the amorphous silicon film and the portion of the crystalline silicon film which is not covered with the mask. The silicon films are then heated by rapid thermal annealing (RTA). By virtue of the existence of the amorphous silicon film, the temperature of the crystalline silicon film is increased uniformly, whereby the portion of the crystalline silicon film covered with the mask is also heated sufficiently and the catalyst element existing in this region moves to the phosphorus-implanted, amorphous portion having high gettering ability. As a result, the concentration of the catalyst element is reduced in the portion of the silicon film covered with the mask. A semiconductor device is manufactured by using this portion.