The invention relates to a method for estimating an impulse response, and a receiver whose received signal is formed of bursts comprising a training sequence and the receiver comprising analog-to-digital converter for sampling the received signal and signal processor for measuring a DC offset in the samples. To simplify the receiver structure, the receiver comprises a calculating device for calculating the impulse response by correlating the samples taken with the training sequence before removing the DC offset, and the signal processor for removing the DC offset effect from the calculated impulse response.
Orthogonal frequency division multiplexing (OFDM) receiver embodiments of the invention provide data demodulator synchronization by finding the end of the short preamble in an IEEE-802.11a burst transmission. This method exploits the fact that there are certain symmetries in the long-preamble that can be used to determine synchronization. The long-preamble sequence is composed of a guard interval (GI) and two long-preamble symbols; the GI is the last 32 samples of the long-preamble symbol. The 32.sup.nd sample of the long-preamble acts as a "pilot" or "anchor" sample in that the previous N and subsequent N samples are complex conjugates, or conjugate "mirror" vectors. Due to the periodicities of the long-preamble, this property repeats every 32 samples. No other samples in the long preamble exhibit this property. Coherent combining is used in one embodiment for robustness. Once this "pilot" or "anchor" sample is located, the end of the short-preamble is declared to have occurred 32 samples earlier, thus establishing a time reference.
An RF receiver comprising a radio-frequency (RF) down-converter for receiving and down-converting an input RF signal to a lower frequency analog signal (e.g., an IF signal or baseband signal) and analog processing circuitry for receiving the lower frequency analog signal from the RF down-converter and outputting a processed analog signal. The processed analog signal includes a DC-offset signal introduced by the RF down-converter and the analog processing circuitry. The RF receiver also comprises an ADC circuit for converting the processed analog signal to a sequence of digital samples and a DC-offset correction circuit for detecting the DC-offset signal in a digital output signal of the RF receiver. The DC-offset correction circuit adds a DC-offset correction signal to the lower frequency analog signal. Adding the DC-offset correction signal to the lower frequency analog signal reduces the DC-offset signal in the processed analog signal at the analog processing circuitry output.
