A flyback converter with synchronous rectifying function comprises a flyback converter, a controllable unit, a controller and a comparator. The controllable unit is connected to a negative pole of a second auxiliary winding of a secondary winding of a transformer in the flyback converter, a gate of a MOS transistor and an output of the comparator. The controller is connected to the gate of the MOS transistor, the ground and a negative pole of a second winding of a current transformer in the flyback converter. The comparator has one input for providing a check voltage and connected to a junction of a diode and a resistor, and another input for providing a reference voltage.
A backlight inverter using electromagnetic induction and full-wave rectification at a second side of a main transformer includes a drive unit for generating a first voltage and a main transformer having first and second coils. The main transformer converts the first voltage from the drive unit into a second voltage, and outputs an AC current of the second voltage to both ends of a lamp. An auxiliary transformer has a first auxiliary coil formed on a current line connecting between the second coil of the main transformer and the lamp and a second auxiliary coil inductively coupled with the first auxiliary coil. The auxiliary transformer detects the current flowing to the lamp. A full-wave rectifier rectifies the current detected by the auxiliary transformer, and a drive controller controls the PWM duty of the first voltage based on a voltage from the full-wave rectifier.
An architecture for a post regulator control circuit that utilizes an advance trigger signal to trigger the post regulator ramp. This advance trigger signal anticipates the beginning and end of a power cycle, and can be used to drive all of the secondary rectifier switches with optimal timing to minimize both cross conduction and body diode conduction. The architecture can be used to cascade an arbitrary number of post regulators. The present invention provides to the auxiliary outputs the full range of regulation available to the main output even in light load conditions. Rather than sensing the beginning or end of the power cycle, the present invention anticipates the beginning and end of the power cycle using the pulse train generated by the feedback loop for the main output. This allows the circuit to prepare the switches for the beginning of the power cycle and avoids problems encountered with inherent propagation delays in the circuit. Using the advance trigger signal, all of the switches may be driven with precise timing.
Disclosed herein is a flyback converter with a synchronous rectifier which is applied to a power supply of a portable computer such as a notebook PC. The flyback converter is operated in a critical conduction mode to turn on/off a main switch at a zero crossing point of an output voltage. The flyback converter is also adapted to control the duty cycle of a synchronous switch using a Zener diode. Therefore, there is no need for a Schottky diode to be connected in parallel with the synchronous switch, resulting in simplification in circuit design.
Disclosed herein is a variable-frequency flyback. The flyback converter comprises a flyback transformer having secondary windings for drive and detection for providing first and second induced voltages induced from an input voltage in first and second turn ratios with a primary winding, respectively, a voltage detector for detecting the second induced voltage, a switching controller for determining, on the basis of a level of the voltage detected by the voltage detector, whether a current load state is the mini load state and outputting a first switching signal according to a result of the determination, a first switch for switching the supply of the second induced voltage in response to the second induced voltage and the first switching signal, and a synchronous rectifier for performing a switching operation depending on a state of the first switch, the synchronous rectifier having its source and drain connected to any one of a voltage output line or ground line connected to the drive secondary winding and its gate connected to the first switch.