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Semiconductor memory device having a controlled output driver characteristic
   
Document Number
US Patent 6462591
Issued Date
October 8, 2002
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Abstract
A semiconductor memory device including an array of memory cells. The memory device includes a first output driver coupled to a first output terminal, and a second output driver coupled to a second output terminal. The memory device further includes a voltage divider coupled between the first and second output terminals, to generate a control voltage based on a voltage level present on the first output terminal and a voltage level present on the second output terminal. The memory device further includes a comparator, coupled to the voltage divider, to compare the control voltage with a reference voltage, wherein an amount of voltage swing of the first output driver is adjusted based on the comparison between the control voltage and the reference voltage.
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Number of Claims:
41
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Owner
Rambus Inc. (Los Altos, CA)
Published
October 8, 2002
Application Number
09/882,420
Filed
June 14, 2001
US Classification
327/112  
Int'l Classification
G11C   7/10   (20060101)   H03K   19/0185   (20060101)   H04L   25/02   (20060101)   G06F   13/40   (20060101)   H03K   19/003   (20060101)  
Examiner
Attorney/Law Firm
Parent Case
This is a continuation of application Ser. No. 09/559,115, filed Apr. 26, 2000, U.S. Pat. No. 6,294,934, which is a continuation of application Ser. No. 09/141,675, filed Aug. 27, 1998, U.S. Pat. No. 6,094,075, which claims priority to the provisional patent application entitled "Current Control Circuit", Ser. No. 60/073,353, filed Feb. 2, 1998, and the provisional patent application entitled "Current Control Technique", Ser. No. 60/057,400, filed Aug. 29, 1997.
USPTO Field of Search
327/77   327/88   327/89   327/112   327/534   327/535   327/537   327/538   327/540   327/543  
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Description
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