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Semiconductor memory device having a controlled output driver characteristic    
United States Patent6462591   
Link to this pagehttp://www.wikipatents.com/6462591.html
Inventor(s)Garrett, Jr.; Billy Wayne (Mountain View, CA); Dillon; John B. (late of Palo Alto, CA); Dillon; by Nancy David (Marshall, VA); Ching; Michael Tak-Kei (Sunnyvale, CA); Stonecypher; William F. (San Jose, CA); Chan; Andy Peng-Pui (San Jose, CA); Griffin; Matthew M. (Mountain View, CA)
AbstractA semiconductor memory device including an array of memory cells. The memory device includes a first output driver coupled to a first output terminal, and a second output driver coupled to a second output terminal. The memory device further includes a voltage divider coupled between the first and second output terminals, to generate a control voltage based on a voltage level present on the first output terminal and a voltage level present on the second output terminal. The memory device further includes a comparator, coupled to the voltage divider, to compare the control voltage with a reference voltage, wherein an amount of voltage swing of the first output driver is adjusted based on the comparison between the control voltage and the reference voltage.



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Inventor     Garrett, Jr.; Billy Wayne (Mountain View, CA); Dillon; John B. (late of Palo Alto, CA); Dillon; by Nancy David (Marshall, VA); Ching; Michael Tak-Kei (Sunnyvale, CA); Stonecypher; William F. (San Jose, CA); Chan; Andy Peng-Pui (San Jose, CA); Griffin; Matthew M. (Mountain View, CA)
Owner/Assignee     Rambus Inc. (Los Altos, CA)
Patent assignment
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Publication Date     October 8, 2002
Application Number     09/882,420
PAIR File History     Application Data   Transaction History
Image File Wrapper   Patent Term   Fees
Litigation
Filing Date     June 14, 2001
US Classification     327/112
Int'l Classification     H03B 001/00
Examiner     Zweizig; Jeffrey
Assistant Examiner    
Attorney/Law Firm     Moniz; Jose G.
Address
Parent Case     This is a continuation of application Ser. No. 09/559,115, filed Apr. 26, 2000, U.S. Pat. No. 6,294,934, which is a continuation of application Ser. No. 09/141,675, filed Aug. 27, 1998, U.S. Pat. No. 6,094,075, which claims priority to the provisional patent application entitled "Current Control Circuit", Ser. No. 60/073,353, filed Feb. 2, 1998, and the provisional patent application entitled "Current Control Technique", Ser. No. 60/057,400, filed Aug. 29, 1997.
Priority Data    
USPTO Field of Search     327/77 327/88 327/89 327/112 327/534 327/535 327/537 327/538 327/540 327/543
Patent Tags     semiconductor memory controlled output driver characteristic
   
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Market Size
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