A process for forming an in-plane switching mode liquid crystal display (IPS-LCD), which defines pixel portions of the common and data electrodes by the same photo-masking and lithography procedure, is disclosed. Accordingly, the misalignment can be avoid. An in-plane switching mode liquid crystal display (IPS-LCD) is also disclosed. The IPS-LCD includes a storage capacitor consisting of storage-capacitor portions of the common and data electrode structures, which is disposed outside the pixel region so as to enhance the aperture ratio of the pixel region.

A fringe field switching type thin film transistor substrate includes a double layered structure gate line; a data line crossing the gate line, wherein a gate insulating film is formed therebetween; a thin film transistor having a gate electrode connected to the gate line, a source electrode connected to the data line, and a drain electrode opposing the source electrode; a double layered structure common line parallel to the gate line; a common electrode plate integrated with the transparent conductive layer of the common line and formed in a pixel area defined by the crossing of the gate line and the data line; a pixel electrode slit covering the drain electrode of the thin film transistor and overlapping the common electrode plate, wherein the gate insulating film is formed therebetween in the pixel area; and a data protection pattern covering the data line and the source electrode.

An array substrate for an in-plane switching liquid crystal display device includes a substrate, a gate line and a common line on the substrate, the gate and common lines disposed parallel to and spaced apart from each other, a gate insulator on the gate and common lines, and a data line substantially perpendicular to the gate and common lines on the gate insulator such that a pixel region defined by the gate and data lines. The pixel region is divided into first and second pixel region by the common line. A thin film transistor is adjacent to a crossing portion of the gate and data lines, the thin film transistor having a drain electrode. A first storage electrode is on the gate insulator over the common line, and the first storage electrode connected to the drain electrode. A second storage electrode is on the gate insulator over the gate line, and the second storage electrode connected to the first storage electrode. A common electrode is connected to the common line and has a plurality of extended portions at the first pixel region perpendicular to the common line. A first pixel electrode at the first pixel region is connected to the drain electrode and has a plurality of extended portions perpendicular to the common line. The plurality of extended portions of first pixel electrode alternate with the plurality of extended portions of common electrode.

An array substrate for an in-plane switching liquid crystal display device includes a substrate, a gate line and a common line on the substrate, the gate and common lines disposed parallel to and spaced apart from each other, a gate insulator on the gate and common lines, and a data line substantially perpendicular to the gate and common lines on the gate insulator such that a pixel region defined by the gate and data lines. The pixel region is divided into first and second pixel region by the common line. A thin film transistor is adjacent to a crossing portion of the gate and data lines, the thin film transistor having a drain electrode. A first storage electrode is on the gate insulator over the common line, and the first storage electrode connected to the drain electrode. A second storage electrode is on the gate insulator over the gate line, and the second storage electrode connected to the first storage electrode. A common electrode is connected to the common line and has a plurality of extended portions at the first pixel region perpendicular to the common line. A first pixel electrode at the first pixel region is connected to the drain electrode and has a plurality of extended portions perpendicular to the common line. The plurality of extended portions of first pixel electrode alternate with the plurality of extended portions of common electrode.