A semiconductor device comprising a lead frame that includes a large area mount pad having small elevated pads to which a semiconductor chip is attached. The small mount pads coupled with usage of a minimal amount of chip attach adhesive provide improved reliability against vapor phase package cracking, and further allow a given lead frame to be used by a family of chip sizes and shapes. The large pad provides good thermal dissipation, as well as stress relief during fabrication of the lead frame.
The invention relates to an optoelectronic component containing an optoelectronic chip (1) and containing a chip carrier (2) that has a central region (3) on which the chip is fixed and that comprises terminals (41, 42, 43, 44) extending outwardly from the central region of the chip carrier (2) to the outside, wherein the chip and portions of the chip carrier are enveloped by a body (5) and wherein the projection of the body and that of each of the longitudinal axes of the terminals onto the contact plane between the chip and the chip carrier are substantially point-symmetrical with respect to the central point of the chip. The invention further relates to an arrangement comprising said component. The advantage of the symmetrical configuration of the component is that the risk of thermomechanically induced failures of the component is reduced.
An integrated circuit package system with interconnect support is provided including providing an integrated circuit, forming an electrical interconnect on the integrated circuit, forming a contact pad having a chip support, and coupling the integrated circuit to the contact pad by the electrical interconnect, with the integrated circuit on the chip support.
