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Description  |
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FIELD OF THE INVENTION
The present invention generally relates to thermal management in
semiconductor devices, and more particularly to a package architecture
that is adapted for use with semiconductor devices to spread heat
generated at hot spots.
BACKGROUND OF THE INVENTION
The performance of electronic circuits and their semiconductor devices
("chips") is limited by temperature. Semiconductor device performance
degrades when the internal temperature reaches or exceeds a particular
limit. For example, in silicon integrated circuit devices, for each ten
degree centigrade rise in junction temperature, the operating lifetime of
the semiconductor device is decreased by a factor of at least two. Demands
by OEMs for smaller package sizes and increased device densities has
resulted in higher power densities, with the concomitant need for
efficient heat dissipation becoming extremely important.
This industry need is compounded, in next generation, highly integrated
semiconductor devices by the occurrence of "hot spots", i.e., localized
areas on the chip having relatively high thermal energy generation. These
hot spots arise at locations on the chip where significant electrical
activity occurs, e.g., processor, I/O control circuits, etc. The manner of
cooling these devices has depended upon many parameters, including the
space available for the cooling process, the temperatures to be
encountered the location(s) of hot spots, and the ability to distribute or
"spread" the thermal energy over sufficient surface area to provide for
efficient heat transfer. In the past, simply passing a fluid over the
device or, over a finned heat sink that is attached to the device, was
sufficient to maintain the semiconductor at safe operating temperatures.
Different cooling fluids have been used, depending upon the application
and the density of the electronic devices in a given circuit. Boiling
liquids are often used, such as fluorinated hydrocarbon refrigerants,
which are delivered to the semiconductor device in liquid form, and are
then boiled to remove heat. These systems often have the highest heat
removal rate for a limited area, but require a considerable amount of
power to operate, i.e. to be pumped to and from the heat transfer site.
It is also well known in the art to employ heat pipes to cool semiconductor
devices and packages. For example, in U.S. Pat. No. 4,697,205, issued to
Eastman, a semiconductor circuit construction is provided in which the
semiconductor junction is constructed as an integral part of a heat pipe
to eliminate the package casing which tends to interfere with heat flow.
The semiconductor chip material directly forms one wall of the casing of a
heat pipe which is constructed as a hollow wafer-like configuration.
In U.S. Pat. No. 4,912,548, issued to Shanker et al., a housing is provided
with a heat pipe that passes through the lid. The heat pipe terminates
within the housing cavity at a hot end. A quantity of working fluid, such
as fluorinated octane, is contained within the package cavity. The heat
pipe communicates with cooling fins that produce a cold end. Heat from the
semiconductor device inside the housing boils the working fluid. The fluid
vapor passes along the heat pipe and is condensed at the cold end to be
converted back to liquid.
In U.S. Pat. No. 5,097,387, issued to Griffith, a circuit chip package is
disclosed which employs low eutectic or melting point solder as a
thermally conductive medium between each circuit chip and the package
cover. The package cover consists of a heat exchanger which includes a
conventional heat pipe structure including a heat transfer fluid filled
chamber, and a plurality of apertured pipes through which is passed
another cooling fluid, such as air, to remove heat from the heat transfer
fluid.
In U.S. Pat. No. 5,708,297, issued to Clayton, a multichip semiconductor
module The is disclosed that is compatible with SIMM memory sockets. The
multichip module includes a molded module frame and a composite
semiconductor substrate subassembly received in a cavity in the frame. A
cover plate and frame, alone or in combination, contain multiple
compartments or channels through which gas or liquid coolant materials can
be circulated to effectively distribute or remove heat generated from the
semiconductor devices. In one embodiment, the cover plate includes a thin
heat pipe.
In U.S. Pat. No. 5,780,928, issued to Rostoker et al., an electronic system
is disclosed that provides thermal transfer from a semiconductor die in a
semiconductor package by at least partially filling a cavity in the
package with a thermally conductive fluid, immersing a heat collecting
portion of a heat pipe assembly into the fluid, and sealing the cavity. In
order that the thermally conductive fluid does not chemically attack the
die or its electrical connections, the die and connections are completely
covered with an encapsulating coating of an inorganic dielectric material
by any of a variety of techniques. The heat pipe provides heat transfer
from within the package to an external heat sink. In one embodiment, an
absorptive wick is disposed within the package to transport condensed
coolant to close proximity with the die.
In U.S. Pat. No. 5,880,524, issued to Xie, a package is provided for
spreading the heat generated by a semiconductor device. The semiconductor
device, such as a CPU, is mounted to a package substrate, a cover is
attached to the package substrate creating a space therebetween for
accommodating the semiconductor device. The package cover includes an
external top surface and an external bottom surface and an inner cavity
that comprises a heat pipe. The semiconductor device is thermally coupled
to the bottom external surface of the cover.
These and other prior art devices use heat pipes to transfer thermal energy
away from the semiconductor device and its package, but do not provide an
efficient heat spreading mechanism for distributing the thermal energy
generated by hot spots on the chip across the package itself. There is a
need for a semiconductor packaging structure that efficiently and evenly
spreads thermal energy generated by hot spots on a chip across a
substantial portion of the package so that the thermal energy may be
removed rapidly and effectively from the package.
SUMMARY OF THE INVENTION
The present invention provides a semiconductor package comprising a
substrate having a top surface and at least one semiconductor device
attached to the top surface of the substrate. A cover is secured to the
substrate creating a space between the cover and the substrate, with the
semiconductor device residing within the space. The cover includes an
inner chamber that is defined by a first wall and a second wall of the
cover. The inner chamber contains a two-phase vaporizable liquid and a
wick. Advantageously, the wick on the second wall includes at least one
recess that forms a thinned wall adjacent to a high heat generation
portion of the semiconductor device. In one embodiment of the invention,
the wick on the second wall includes at least one channel that
communicates with at least one recess. In another embodiment of the
invention the second wall includes a recessed portion corresponding to the
recessed portion of the wick.
BRIEF DESCRIPTION OF THE DRAWINGS
These and other features and advantages of the present invention will be
more fully disclosed in, or rendered obvious by, the following detailed
description of the preferred embodiments of the invention, which are to be
considered together with the accompanying drawings wherein like numbers
refer to like parts and further wherein:
FIG. 1 is an exploded perspective view of a semiconductor package lid heat
spreader formed in accordance with one embodiment of the present
invention;
FIG. 2 is a cross-sectional view of a bottom wall of the semiconductor
package lid heat spreader shown in FIG. 1, as taken along line 2--2 in
FIG. 1;
FIG. 3 is a perspective view of the semiconductor package lid heat spreader
shown in FIG. 1, but with an edge open for clarity of illustration;
FIG. 4 is a cross-sectional view of the semiconductor package lid heat
spreader shown in FIG. 3, as taken along line 4--4 in FIG. 3;
FIG. 5 is an enlarged and broken-away cross-sectional view of a corner
portion of the semiconductor package lid heat spreader shown in FIG. 4;
FIG. 6 is a plan view of an alternative, exemplary embodiment of a bottom
wall of the semiconductor package lid heat spreader;
FIG. 7 is a plan view of another alternative, exemplary embodiment of a
bottom wall of the semiconductor package lid heat spreader;
FIG. 8 is a cross-sectional view of the bottom wall of the semiconductor
package lid heat spreader shown in FIG. 7, as taken along line 8--8 in
FIG. 7;
FIG. 9 is a plan view of another exemplary embodiment of a bottom wall of
the semiconductor package lid heat spreader having more than one recess;
FIG. 10 is an exploded perspective view of a semiconductor package lid heat
spreader formed in accordance with a further embodiment of the present
invention adapted to spread heat from a plurality of semiconductors.
FIG. 11 is a plan view of another exemplary embodiment of a bottom wall of
the semiconductor package lid heat spreader having more than one recess;
and
FIG. 12 is a cross-sectional view of the bottom wall of the semiconductor
package lid heat spreader shown in FIG. 11, as taken along line 12--12 in
FIG. 11 showing a thinning of the bottom wall and wick.
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT
This description of preferred embodiments is intended to be read in
connection with the accompanying drawings, which are to be considered part
of the entire written description of this invention. In the description,
relative terms such as "horizontal," "vertical," "up," "down," "top" and
"bottom" as well as derivatives thereof (e.g., "horizontally,"
"downwardly," "upwardly," etc.) should be construed to refer to the
orientation as then described or as shown in the drawing figure under
discussion. These relative terms are for convenience of description and
normally are not intended to require a particular orientation. Terms
including "inwardly" versus "outwardly," "longitudinal" versus "lateral"
and the like are to be interpreted relative to one another or relative to
an axis of elongation, or an axis or center of rotation, as appropriate.
Terms concerning attachments, coupling and the like, such as "connected"
and "interconnected," refer to a relationship wherein structures are
secured or attached to one another either directly or indirectly through
intervening structures, as well as both movable or rigid attachments or
relationships, unless expressly described otherwise. The term "operatively
connected" is such an attachment, coupling or connection that allows the
pertinent structures to operate as intended by virtue of that
relationship.
Referring to FIG. 1, a semiconductor package heat spreader 5 formed in
accordance with the present invention includes a substrate 7 having a
semiconductor device 9 mounted on the top surface 11 of substrate 7.
Semiconductor device 9 is often mechanically and electrically coupled to
the top surface 11 of substrate 7, via a plurality of solder bump
connections 13. Substrate 7 may contain one or more wiring layers (not
shown) that electrically interconnect semiconductor device 9 to pins or
the like (not shown) located along a bottom surface 15 of substrate 7.
Referring to FIGS. 3-5, a cover/lid 20 is attached to substrate 7 and forms
avoid space or gap 21 between the interior surface 23 of cover/lid 20 and
top surface 11 of substrate 7. Mounting flanges 25 are formed along the
peripheral edges of cover/lid 20 so that substrate 7 may be hermetically
fastened to cover/lid 20. Mounting flanges 25 serve to support cover/lid
20 above substrate 7 and semiconductor device 9. The height of mounting
flanges 25 is selected such that gap 21 is sized to accept semiconductor
device 9. A heat transfer medium of the type well known in the art may be
positioned between the top surface of semiconductor device 9 and cover/lid
20 to thermally couple them together. The heat transfer medium may
comprise a thermal grease, such as a silver filled epoxy or the like. The
thickness of the heat transfer medium will vary depending upon the
performance requirements of semiconductor device 9. Generally, the
thickness of the heat transfer medium varies between about 0.2 millimeters
(mm) to about 0.8 millimeters (mm).
Referring to FIGS. 1-5, cover/lid 20 includes a vapor chamber 35 that is
defined between an outer or top wall 40 and an inner or bottom wall 43,
and extends transversely and longitudinally throughout cover/lid 20. In a
preferred embodiment, top wall 40 and bottom wall 43 comprise
substantially uniform thickness sheets of a thermally conductive material,
and are spaced-apart by about 0.2 (mm) to about 0.3 (mm) so as to form a
void space or vapor chamber 35 between them. A two-phase vaporizable
liquid (not shown) resides within vapor chamber 35, and serves as the
working fluid for the heat spreader. Cover/lid 20 (including top wall 40
and bottom wall 43) is made of copper-silicon-carbide (CuSiC) or
aluminum-silicon-carbide (AlSiC), with freon generally chosen as the
two-phase vaporizable liquid since it is chemically compatible with
aluminum-silicon-carbide (AlSiC) at elevated temperatures, and may possess
a relatively high latent heat. Vapor chamber 35 is created by the
attachment of top wall 40 and bottom wall 43, along their common edges,
which are then hermetically sealed at their joining interface.
Top wall 40 comprises a substantially planer inner wicking surface 46 with
an integrally formed wicking layer of aluminum-silicon-carbide (AlSiC) or
copper-silicon-carbide (CuSiC) having an average thickness of about 0.1 mm
to 1.0 mm. Bottom wall 43 of cover/lid 20 comprises an inner wicking
surface 46 with an integrally formed wicking layer of
aluminum-silicon-carbide (AlSiC) or copper-silicon-carbide (CuSiC) that is
positioned over substantially all of bottom wall 43, and which includes
one or more discrete recesses 48. Optionally, one or more recessed
channels or troughs 53 may be formed in inner wicking surface 46.
More particularly, recesses 48 comprise a depression in inner wicking
surface 46 that forms a thinned wall 55 of wicking material at the bottom
of recess 48. In one preferred embodiment, thinned wall 55 may have a
thickness of about 0.01 mm to about 0.06 mm. Recess 48 may include any
cross-sectional profile, such as rectilinear, polygonal, or curved, with
thinned wall 55 having substantially the same cross-sectional shape
Advantageously, thinned wall 55 comprises a relatively low thermal
resistance as compared to the remainder of inner wicking surface 46.
Thinned wall 55 is sized and located in inner wicking surface 46 and on
bottom wall 43 so as to correspond with, and be positioned adjacent to
localized areas on semiconductor device 9 having relatively high thermal
energy generation, i.e., adjacent to so called "hot spots" on the chip.
These hot spots often arise at locations on semiconductor device 9 where
significant electrical activity occurs, e.g., processor, I/O control
circuits, etc. The thinned structure of inner wicking surface 46 at the
bottom of recess 48 causes the two-phase vaporizable liquid that pools
within recess 48 to quickly evaporate so as to enhance thermal transfer
communication between the hot spot on semiconductor 9, inner wicking
surface 46 and top wall 40 of cover/lid 20.
In this way, the main evaporator region of cover/lid 20 (i.e., recess 48
and thinned wall 55) is advantageously located adjacent to the hot-spots
on semiconductor device 9, whereas the condenser region of cover/lid 20
(i.e., the remainder of inner wicking surface 46 or channel 53) is located
adjacent relatively lower temperature regions of semiconductor 9. In the
evaporator region of thinned wall 55, the working fluid is constantly,
quickly, and completely vaporized by heat input from the hot-spots on
semiconductor device 9, while in the condenser region the vapor gives up
heat and is condensed to liquid. Inner wicking surfaces 46 transport the
condensed liquid back to the evaporator region, i.e., recess 48 and
thinned wall 55 of inner wicking surface 46 by means of capillary flow.
This arrangement effectively spreads thermal energy across the entire
package so that it may be drawn off and dissipated by known means, e.g.,
conventional finned heat sinks or heat pipes, attached to the outer
surface of top wall 40. It will be understood that one or more recesses
48a,48b,48c,48d,48e,48f (FIGS. 8-10) may be located within inner wicking
surface 46 depending upon the number of "hot-spots" anticipated for a
given semiconductor device 9. Of course, more than one semiconductor
device 9a-d may be resident within semiconductor package heat spreader 5
necessitating the use of several recesses 48a-d in inner wicking surface
46 (FIG. 10).
Referring to FIG. 6, one or more recessed channels 53a-f may be formed in
inner wicking surface 46. Channels 53a-f have a generally "fan-shaped"
cross-sectional profile, i.e., the channels extend radially outwardly from
the peripheral edge of recess 48. FIGS. 1 and 7 show alternative
embodiments of radially extending channels. Preferably, one end of each
channel 53a-f communicates with a recess 48. In a "an-shaped" channel
embodiment, the narrow end of the fan-shape will open into a portion of
recess 48, with the remainder of channel 53a-f widening and thickening as
it moves away from recess 48. Channels 53a-f may have a constant
cross-sectional profile, e.g., rectilinear, curved, polygonal, and extend
in a single direction, or may curve or chang | | |
