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Claims  |
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What is claimed is:
1. A method of manufacturing a semiconductor structure comprising:
forming a first substrate having a first surface, a second surface, a first
opening entirely through said first substrate, and a plurality of bond
pads on at least one of said first and second surfaces;
coupling a first interconnect device to a select one of said first and
second surfaces of said first substrate, wherein said interconnect device
extends across at least a portion of said first opening; and,
coupling a first semiconductor to said first interconnect device.
2. The method of manufacturing a semiconductor structure according to claim
1, wherein said first interconnect device is both physically and
electrically coupled to said select one of said first and second surfaces
of said first substrate.
3. The method of manufacturing a semiconductor structure according to claim
1, wherein said first semiconductor is both physically and electrically
coupled to said first interconnect device.
4. The method of manufacturing a semiconductor structure according to claim
3, wherein:
said first interconnect device comprises a flex circuit having a plurality
of contacts; and,
said first semiconductor comprises a plurality of semiconductor device bond
pads, wherein at least one of said plurality of semiconductor device bond
pads is coupled to a select one of said plurality of contacts on said
first interconnect device by a solder ball.
5. The method of manufacturing a semiconductor structure according to claim
3, wherein:
said first interconnect device comprises a TAB tape having a plurality of
conductive bumps; and,
said first semiconductor comprises a plurality of semiconductor device bond
pads, wherein at least one of said plurality of semiconductor device bond
pads is coupled to an associated one of said plurality of conductive bumps
on said first interconnect device.
6. The method of manufacturing a semiconductor structure according to claim
1, wherein said first semiconductor is coupled to said first interconnect
device by positioning said first semiconductor to generally overlie said
first substrate and physically and electrically coupling said
semiconductor device to said interconnect device.
7. The method of manufacturing a semiconductor structure according to claim
6, further comprising:
providing a base substrate having a first surface, a second surface, and a
plurality of base bond pads formed on said first surface, wherein said
first substrate is superposed over said base substrate and at least one of
said plurality of base bond pads is electrically coupled to said first
substrate; and,
positioning a second semiconductor device having a plurality of
semiconductor device bond pads at least partially within said first
opening of said first substrate, wherein at least one of said
semiconductor device bond pads of said second semiconductor device couple
to at least one of said plurality of base bond pads such that said second
semiconductor is physically and electrically coupled to said base
substrate.
8. The method of manufacturing a semiconductor structure according to claim
6, further comprising:
providing a second substrate having a first surface, a second surface, a
first opening entirely through said second substrate, and a plurality of
bond pads on at least one of said first and second surfaces, wherein said
second substrate is superposed over said first substrate such that at
least a portion of said first semiconductor is positioned within said
first opening of said second substrate, and at least one of said plurality
of bond pads on said second substrate is electrically coupled to at least
one of said plurality of bond pads on said first substrate.
9. The method of manufacturing a semiconductor structure according to claim
1, further comprising:
providing a second substrate having a first surface, a second surface, a
first opening entirely through said second substrate, and a plurality of
bond pads on at least one of said first and second surfaces, wherein said
second substrate is superposed over said first substrate such that said
first opening of said second substrate is aligned generally in register
with said first opening of said first substrate, and at least one of said
plurality of bond pads on said second substrate is electrically coupled to
at least one of said plurality of bond pads on said first substrate.
10. The method of manufacturing a semiconductor structure according to
claim 1, wherein said first semiconductor is positioned generally within
said first opening of said first substrate, said first semiconductor is
physically coupled to said interconnect device, and said first
semiconductor is electrically coupled to at least one of said plurality of
bond pads of said first substrate.
11. The method of manufacturing a semiconductor structure according to
claim 10, wherein said first semiconductor is electrically coupled to said
first substrate by bond wires.
12. The method of manufacturing a semiconductor structure according to
claim 10, wherein said first semiconductor is electrically coupled to at
least one of said plurality of bond pads by electrically coupling to said
first interconnect device, and electrically coupling said first
interconnect device to at least one of said plurality of bond pads of said
first substrate.
13. A method of manufacturing a semiconductor structure comprising:
providing a base substrate having a first surface and a plurality of base
bond pads formed on said first surface;
providing a first substrate having a first surface, a second surface, a
first opening entirely through said first substrate, and a plurality of
bond pads on at least one of said first and second surfaces;
positioning said first substrate generally over said base substrate;
coupling at least one of said plurality of bond pads of said first surface
of said first substrate to at least one of said plurality of base bond
pads;
coupling a first interconnect device to said first substrate, said first
interconnect positioned between said first substrate and said base
substrate such that said interconnect device extends across at least a
portion of said first opening; and,
coupling a first semiconductor to said interconnect device such that said
first semiconductor is positioned generally within said first opening.
14. A method of manufacturing a semiconductor structure comprising:
providing a base substrate having a first surface, a second surface, and a
plurality of base bond pads formed on said first surface;
providing a first substrate having a first surface, a second surface, a
first opening entirely through said first substrate, and a plurality of
bond pads on at least one of said first and second surfaces;
positioning said first substrate generally over said base substrate;
coupling at least one of said plurality of bond pads of said first
substrate to at least one of said plurality of base bond pads;
coupling a first interconnect device to said first substrate positioned
between said first substrate and said base substrate such that said
interconnect device extends across at least a portion of said first
opening;
positioning a first semiconductor generally within said first opening of
said first substrate; and,
coupling at least one bond wire between said first semiconductor and at
least one of said plurality of bond pads on said first substrate.
15. A method of manufacturing a semiconductor structure comprising:
providing a base substrate having a first surface and a plurality of base
bond pads formed on said first surface;
providing a first substrate having a first surface, a second surface, a
first opening entirely through said first substrate, and a plurality of
bond pads on at least one of said first and second surfaces;
positioning said first substrate generally over said base substrate;
coupling at least one of said plurality of bond pads of said first
substrate to at least one of said plurality of base bond pads;
coupling a first interconnect device to said first substrate, said first
interconnect positioned between said first substrate and said base
substrate such that said interconnect device extends across at least a
portion of said first opening;
adhesively fixing a first semiconductor to said first interconnect device
such that said first semiconductor is generally positioned within said
first opening of said first substrate; and,
coupling at least one bond wire between a select one of s aid plurality of
semiconductor bond pads and a respective one of said plurality of bond
pads on said first substrate.
16. A method of manufacturing a semiconductor structure comprising:
providing a base substrate having a first surface and a plurality of base
bond pads formed on said first surface;
providing a first substrate having a first surface, a second surface, a
first opening entirely through said first substrate, and a plurality of
bond pads on at least one of said first and second surfaces;
coupling at least one of said plurality of bond pads of said first surface
of said first substrate to an associated one of said plurality of base
bond pads;
electrically and physically coupling a first interconnect device to said
first substrate, said first interconnect device positioned between said
first substrate and said base substrate such that said interconnect device
extends across at least a portion of said first opening; and,
electrically coupling a first semiconductor positioned generally within
said first opening of said first substrate to said first interconnect
device.
17. A method of manufacturing a semiconductor structure comprising:
providing a base substrate having a first surface and a plurality of base
bond pads formed on said first surface;
providing a first substrate having a first surface, a second surface, a
first opening entirely through said first substrate, and a plurality of
bond pads on at least one of said first and second surfaces;
electrically coupling at least one of said plurality of bond pads of said
first substrate to at least one of said plurality of base bond pads by
solder balls;
coupling a first interconnect device having a plurality of contacts to said
first substrate positioned between said first substrate and said base
substrate such that said interconnect device extends across at least a
portion of said first opening;
positioning a first semiconductor having a plurality of semiconductor
device bond pads generally within said first opening of said first
substrate; and,
coupling at least one of said plurality of semiconductor device bond pads
to at least one of said plurality of contacts on said first interconnect
device.
18. The method of manufacturing a semiconductor structure according to
claim 17, wherein said first interconnect device comprises a flex circuit
and at least one of said plurality of semiconductor device bond pads
electrically couple to at least one of said plurality of contacts on said
flex circuit using solder balls.
19. The method of manufacturing a semiconductor structure according to
claim 17, wherein said first interconnect device comprises a TAB tape and
said plurality of contacts comprise a plurality of conductive bumps and at
least one of said plurality of semiconductor device bond pads electrically
couple to at least one of said plurality of conductive bumps on said TAB
tape.
20. A method of manufacturing a semiconductor structure according
comprising:
providing a plurality of substrates, each substrate having a first surface,
a second surface, at least one opening extending entirely therethrough,
and a plurality of bond pads on at least one of said first and second
surfaces;
arranging said plurality of substrates in a stack;
coupling at least one of said plurality of bond pads on each of said
plurality of substrates to at least one of said plurality of bond pads on
an adjacent one of said plurality of substrates in said stack;
coupling an interconnect device to one of said first and second surfaces of
each substrate such that said interconnect device extends across at least
a portion of said at least one opening of an associated one of said
plurality of substrates;
positioning a semiconductor in each opening of said plurality of
substrates; and,
coupling each semiconductor to an associated one of said plurality of
interconnect devices.
21. The method of manufacturing a semiconductor structure according to
claim 20, wherein at least one of said plurality of semiconductors is
positioned generally within said al least one opening of a first one of
said plurality of substrates and coupled to a respective interconnect
device, wherein said respective interconnect device is coupled to a second
one of said plurality of substrates different from said first one of said
plurality of substrates.
22. The method of manufacturing a semiconductor structure according to
claim 20, wherein at least one of said plurality of semiconductors is
positioned generally within said at least one opening of a first one of
said plurality of substrates and coupled to a respective interconnect
device, wherein said respective interconnect device is also coupled to
said first one of said plurality of substrates.
23. A method of manufacturing a semiconductor structure comprising:
providing a first substrate having a first surface, a second surface, a
first opening extending entirely through said first substrate, and a
plurality of bond pads on at least one of said first and second surfaces,
coupling a first interconnect device to said second surface of said first
substrate, wherein said first interconnect device extends across at least
a portion of said first opening of said first substrate;
positioning a first semiconductor generally within said first opening of
said first semiconductor device;
coupling said first semiconductor to said first interconnect device;
providing a second substrate having a first surface, a second surface, a
first opening extending entirely through said first substrate, and a
plurality of bond pads on at least one of said first and second surfaces;
superposing said second substrate over said first substrate such that said
second surface of said second substrate faces and is in spaced relation
with said first surface of said first substrate;
electrically coupling at least one of said plurality of bond pads on said
first substrate to at least one of said plurality of bond pads of said
second substrate;
coupling a second interconnect device to said second surface of said second
substrate such that said second interconnect device extends across at
least a portion of said first opening of said second substrate;
positioning a second semiconductor generally within said first opening of
said second semiconductor device; and,
coupling said second semiconductor to said second interconnect device.
24. The method of manufacturing a semiconductor structure according to
claim 23, wherein:
said first semiconductor further comprises a plurality of semiconductor
device bond pads and at least one of said semiconductor device bond pads
is electrically coupled to at least one of said plurality of bond pads on
said first substrate by bond wire.
25. The method of manufacturing a semiconductor structure according to
claim 23, wherein:
said first semiconductor further comprises a plurality of semiconductor
device bond pads and at least one of said semiconductor device bond pads
is electrically coupled to said first interconnect device.
26. A method of manufacturing a semiconductor structure comprising:
providing a base substrate having a first surface and a plurality of base
bond pads formed on said first surface,
providing a first substrate having a first surface, a second surface, a
plurality of bond pads on said first surface, a plurality of bond pads on
said second surface, and a first opening extending entirely therethrough;
superposing said first substrate over and in spaced relation with said base
substrate;
electrically coupling at least one of said plurality of bond pads on said
second surface of said first substrate to at least one of said plurality
of base bond pads on said first surface of said base substrate by at least
one solder ball;
coupling a first interconnect device to said second surface of said first
substrate and facing said first surface of said base substrate such that
said first interconnect device extends across at least a portion of said
first opening of said first substrate;
positioning a first semiconductor having a plurality of semiconductor
device contacts generally within said first opening in said first
substrate;
coupling said first semiconductor to said first interconnect device such
that at least one of said semiconductor device contacts electrically
couples to at least one of said plurality of bond pads on said first
surface of said first substrate;
providing a second substrate having a first surface, a second surface, a
plurality of bond pads on said first surface, a plurality of bond pads on
said second surface, and a first opening extending entirely therethrough;
superposing said second substrate over and in spaced relation with said
first substrate;
electrically coupling at least one of said plurality of bond pads on said
second surface of said second substrate to at least one of said plurality
of bond pads on said first surface of said first substrate by at least one
solder ball;
coupling a second interconnect device to said second surface of said second
substrate such that said second interconnect device is facing said first
surface of said first substrate and said second interconnect device
extends across at least a portion of said first opening of said second
substrate;
positioning a second semiconductor having a plurality of semiconductor
device contacts generally within said first opening in said second
substrate;
coupling said second semiconductor to said second interconnect device, such
that at least one of said second semiconductor device contacts is
electrically coupled to at least one of said plurality of bond pads on
said first surface of said second substrate;
providing a third substrate having a first surface, a second surface, a
plurality of bond pads on said first surface, a plurality of bond pads on
said second surface, and a first opening extending entirely therethrough;
superposing said third substrate over and in spaced relation with said
second substrate;
electrically coupling at least one of said plurality of bond pads on said
second surface of said third substrate to at least one of said plurality
of bond pads on said first surface of said second substrate by at least
one solder ball;
coupling a third interconnect device to said second surface of said third
substrate such that said third interconnect device is facing said first
surface of said second substrate and said third interconnect device
extends across at least a portion of said first opening of said third
substrate;
positioning a third semiconductor having a plurality of semiconductor
device contacts generally within said first opening in said third
substrate; and,
coupling said third semiconductor to said third interconnect device such
that at least one of said semiconductor device contacts electrically
couples to at least one of said plurality of bond pads on said first
surface of said third substrate.
27. A method of manufacturing a semiconductor structure comprising:
providing a base substrate having a first surface and a plurality of base
bond pads formed on said first surface,
providing a first substrate having a first surface, a second surface, a
plurality of bond pads on said first surface, a plurality of bond pads on
said second surface, and a first opening extending entirely therethrough;
superposing said first substrate over and in spaced relation with said base
substrate;
electrically coupling at least one of said plurality of bond pads on said
second surface of said first substrate to at least one of said plurality
of base bond pads on said first surface of said base substrate by at least
one solder ball;
coupling a first interconnect device to said second surface of said first
substrate such that said first interconnect is facing said first surface
of said base substrate and said first interconnect device extends across
at least a portion of said first opening of said first substrate;
positioning a first semiconductor generally within said first opening in
said first substrate;
electrically and physically coupling said first semiconductor to said first
interconnect device;
providing a second substrate having a first surface, a second surface, a
plurality of bond pads on said first surface, a plurality of bond pads on
said second surface, and a first opening extending entirely therethrough;
superposing said second substrate over and in spaced relation with said
first substrate;
electrically coupling at least one of said plurality of bond pads on said
second surface of said second substrate to at least one of said plurality
of bond pads on said first surface of said first substrate by at least one
solder ball;
coupling a second interconnect device to said second surface of said second
substrate such that said second interconnect is facing said first surface
of said first substrate and said second interconnect device extends across
at least a portion of said first opening of said second substrate;
positioning a second semiconductor generally within said first opening in
said second substrate;
electrically and physically coupling said second semiconductor to said
second interconnect device;
providing a third substrate having a first surface, a second surface, a
plurality of bond pads on said first surface, a plurality of bond pads on
said second surface, and a first opening extending entirely therethrough;
superposing said third substrate over and in spaced relation with said
second substrate;
electrically coupling and at least one of said plurality of bond pads on
said second surface of said third substrate to at least one of said
plurality of bond pads on said first surface of said second substrate by
at least one solder ball;
coupling a third interconnect device to said second surface of said third
substrate such that said third interconnect device is facing said first
surface of said second substrate and said third interconnect device
extends across at least a portion of said first opening of said third
substrate;
positioning a third semiconductor generally within said first opening in
said third substrate; and,
electrically and physically coupling said third semiconductor to said third
interconnect device. |
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Claims |
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