Lead-over-chip leadframes for coupling chip bond pads to the pins of a memory package contain a first plurality of short leads for coupling data chip bond pads to data pins on a first side of the memory package; a first plurality of long leads for coupling data chip bond pads to data pins on a second side of the memory package; a second plurality of short leads for coupling address chip bond pads to address pins on the second side of the memory package; and a second plurality of long leads for coupling address chip bond pads to address pins on the first side of the memory package.
RELATED APPLICATION
This is a divisional application of U.S. patent application Ser. No. 09/642,683, filed Aug. 21, 2000, now U.S. Pat. No. 6,445,603 titled "ARCHITECTURE, PACKAGE ORIENTATION AND ASSEMBLY OF MEMORY DEVICES," and commonly assigned, the entire contents of which are incorporated herein by reference.
A semiconductor memory device comprising control pads and input/output I/O pads capable of reducing the data path for reading and writing data in a cell array, and a method for driving the semiconductor memory device are included. The semiconductor memory device comprises a plurality of memory banks arranged at a cell region of a memory chip, and a plurality of control pads and a plurality of I/O pads, separately arranged from each other at the memory chip, for reading/writing data from/in the memory banks, wherein the plurality of control pads and I/O pads are dispersed at the peripheral region between adjacent memory banks and at the outer portions of the memory banks.
A semiconductor device assembly includes a semiconductor device and a lead frame having lead fingers for connection to the semiconductor device. The lead frame may include floating no connect (NC) lead fingers with inner portions of the floating NC lead fingers electrically isolated from the semiconductor device and the associated outer portion of the floating NC lead fingers. Floating NC lead fingers may separate lead fingers prone to causing induction noise from lead fingers subject to induction effects. The floating NC lead fingers may also allow the semiconductor device to be securely adhered to the lead fingers with no air pockets therebetween. A method of forming a semiconductor device assembly is also provided.
A semiconductor device assembly includes a semiconductor device and a lead frame having lead fingers for connection to the semiconductor device. The lead frame may include floating no-connect (NC) lead fingers with inner portions of the floating NC lead fingers electrically isolated from the semiconductor device and the associated outer portion of the floating NC lead fingers. Floating NC lead fingers may separate lead fingers prone to causing induction noise from lead fingers subject to induction effects. The floating NC lead fingers may thus reduce the inductance noise of the lead fingers. The floating NC lead fingers may also allow the semiconductor device to be securely adhered to the lead fingers with no air pockets therebetween. A method of forming a semiconductor device assembly is also provided.
A lead frame includes pins for a plurality of parts. The pins for the plurality of the parts include first pins for a first part and first pins for a second part. The first pins for the first part include first shaped pins and second shaped pins. Each of the first shaped pins has a wide area of a first length, and a narrow area. Each of the second shaped pins has a wide area of a second length and a narrow area. The first length and the second length are not equal. The first pins for the first part are interdigitated with the first pins for the second part.
