A hybrid memory system having electromechanical memory cells is disclosed. A memory cell core circuit has an array of electromechanical memory cells, in which each cell is a crossbar junction at least one element of which is a nanotube or a nanotube ribbon. An access circuit provides array addresses to the memory cell core circuit to select at least one corresponding cell. The access circuit is constructed of semiconductor circuit elements.
CROSS-REFERENCE TO RELATED APPLICATIONS
This application is related to the following applications, all of which are filed on the same date that this application is filed, all of which are assigned to the assignee of this application, and all of which are incorporated by reference in their entirety: Electromechanical Memory Having Cell Selection Circuitry Constructed with Nanotube Technology (U.S. patent application Ser. No. 09/915/093); and Electromechanical Memory Array Using Nanotube Ribbons and Method for Making Same (U.S. patent application Ser. No. 09/915,173).
A nano-elastic memory device and a method of manufacturing the same. The nano-elastic memory device may include a substrate, a plurality of lower electrodes arranged in parallel on the substrate, a support unit formed of an insulating material to a desired or predetermined thickness on the substrate having cavities that expose the lower electrodes, a nano-elastic body extending perpendicular from a surface of the lower electrodes in the cavities, and a plurality of upper electrodes formed on the support unit and perpendicularly crossing the lower electrodes over the nano-elastic bodies.
This invention is directed to polyimide films having a carbon nanotube filler to provide a surface resistivity in a range from 50 ohm/square to 1.0.times.10.sup.15 ohms/square. The electrically conductive polyimides of the present invention have an excellent balance of properties relative to conventional polyimides having a conductive filler, due at least in part to the film's water content, degree of imidization and polymer orientation.
An integrated circuit (101) includes electrical circuitry (105) formed on a substrate (103). An interconnect layer (109, 117) is formed over the electrical circuitry (105). In one example, a plurality of magneto-resistive random access memory cells (MRAM) (161, 171) is implemented above the interconnect layer. Each of the MRAM cells comprises a magneto-resistive tunnel junction (MTJ) storage element. A transistor (130) is formed-over the interconnect layer (109, 117). In one embodiment, the transistor is implemented as a thin film transistor (TFT). In one embodiment the transistor is a select transistor and may be coupled to one or more of the MTJ storage elements. Access circuitry (203, 205, 207, 209) is formed on the substrate (103) under the plurality of MRAM cells (161, 171).
Provided are: a composite formed by mixing a carbon nanotube structure and a metal-containing material, the carbon nanotube structure having a network structure constructed by mutually cross-linking functional groups bonded to plural carbon nanotubes through chemical bonding of the functional groups together; and a method of manufacturing the same. The composite of the carbon nanotube and the metal-containing material is capable of effectively using characteristics of the carbon nanotube structure.
