Disclosed is a video signal processing system for outputting video signals for driving monitors during one period of clock signal. The system includes: a clock signal (CLK) supply part for outputting CLK for transmitting video signal; a monitor controller for outputting memory access signal (MA) by the period of CLK; a memory buffer for outputting data signal according to MA; latch circuits for latching data signal, dividing into multiple data during one period of CLK and outputting the latched data to the monitors; an inverter inverting CLK; a delay circuit delaying inverted CLK; and a flip-flop circuit for outputting in flip-flop after receiving delayed CLK and inputting into the latch circuits.
A communication apparatus of the present invention has a function of displaying a plurality of video images on a same screen. The communication apparatus includes a first synthesizing unit with synthesizing video data transmitted from a remote communication terminal and video data on a local communication terminal so that a video image on the remote communication terminal and a video image on the local communication terminal are displayed on the same screen in accordance with display layout information common to the remote communication terminal to the local communication terminal that is determined based on a display video image number on the remote communication terminal and a display video image number on the local communication terminal, and a display unit which displays video images corresponding to the synthesized video data obtained by the first synthesizing unit.
