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Document Number
US Patent 6703665
Issued Date
March 9, 2004
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Abstract
A withstand voltage region of a second conductivity type is formed in a drain layer of a first conductivity type in a semiconductor substrate, and a conductive region of the first conductivity type is partly formed in the withstand voltage region by being diffused from the surface of the withstand voltage region. The conductive region has a bottom held in contact with the drain layer. A base region and a source region are formed in the surface of semiconductor substrate, with a region between the source region and the conductive region serving as a channel region, thus producing a transistor. When a voltage is applied to a gate electrode film on the channel region to form an inverted layer, the source region and the drain layer are connected to each other by the inverted layer and the conductive region.
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Number of Claims:
9
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Published
March 9, 2004
Application Number
09/639,811
Filed
August 17, 2000
US Classification
257/341   257/139 257/262 257/263 257/302 257/328 257/333 257/339 257/342 257/E21.418 257/E29.04 257/E29.066 257/E29.198 257/E29.257 257/E29.258
Int'l Classification
H01L   29/66   (20060101)   H01L   29/78   (20060101)   H01L   21/02   (20060101)   H01L   21/336   (20060101)   H01L   29/739   (20060101)   H01L   29/10   (20060101)   H01L   29/08   (20060101)   H01L   29/02   (20060101)  
Examiner
Assistant Examiner
Priority Data
Aug 20, 1999 [JP] 11-233405
USPTO Field of Search
257/342   257/341   257/339   257/328   257/262   257/263   257/139   257/302   257/333  
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