or
Bookmark and Share
High speed, high common mode range, low delay comparator input stage
   
Document Number
US Patent 6703872
Issued Date
March 9, 2004
Link
Map
Abstract
The comparator input stage uses low voltage transistors 20 and 21 as the input pair. They have a small threshold voltage, and hence support a low common mode. The circuit includes a current sink 22 coupled to the input pair 20 and 21; a first resistor 33 coupled between a first branch of the input pair and a voltage node V24; a second resistor 36 coupled between a second branch of the input pair and the voltage node V24; a first transistor 23 coupled to the voltage node V24; a second transistor 24 having a gate coupled to a gate of the third transistor 23; a third resistor 32 coupled to a first end of the second transistor 24; and a current source 29 coupled to a second end of the second transistor 24 for controlling a voltage across the third resistor 32 wherein the voltage across the third resistor 32 sets a voltage at the voltage node V24. This voltage at the voltage node V24 serves as an open loop regulation for protection of the input pair transistors 20 and 21.
Tags:
Description:
Amusing 0%
Clever 0%
Complex 0%
Efficient 0%
Historic 0%
Important 0%
Innovative 0%
Interesting 0%
Practical 0%
Simple 0%
Number of Claims:
16
Comments:
no comments yet
Owner
Published
March 9, 2004
Application Number
10/314,932
Filed
December 9, 2002
US Classification
327/65   327/563 327/66
Int'l Classification
H03K   5/24   (20060101)   H03F   1/52   (20060101)   H03K   5/22   (20060101)  
Examiner
Parent Case
This application claims priority under 35 USC .sctn. 119 (e) (1) of provisional application No. 60/339,965 filed Dec. 10, 2001.
USPTO Field of Search
327/63   327/65   327/66   327/70   327/89   327/52   327/53   327/307   327/563   330/261  
Related Patents
Claims
Description
About| FAQs| Terms & Disclaimer| Link to Us| Contact Us