An interconnect structure including a patterned multilayer of spun-on dielectrics as well as methods for manufacturing the same are provided. The interconnect structure includes a patterned multilayer of spun-on dielectrics formed on a surface of a substrate. The patterned multilayer of spun-on dielectrics is composed of a bottom low-k dielectric, a buried etch stop layer, and a top low-k dielectric, wherein the bottom and top low-k dielectrics have a first composition, the said buried etch stop layer has a second composition which is different from the first composition and the buried etch stop layer is covalently bonded to said top and bottom low-k dielectrics. The interconnect structure further includes a polish stop layer formed on the patterned multilayer of spun-on dielectrics; and metal conductive regions formed within the patterned multilayer of spun-on dielectrics. Covalent bonding is achieved by employing an organosilane having functional groups that are capable of bonding with the top and bottom dielectric layers.
A semiconductor device having interconnects is reduced in leakage current between the interconnects and improved in the TDDB characteristic. It includes an insulating interlayer 108, and interconnects 160 filled in grooves formed in the insulating interlayer, including a copper layer 124 mainly composed of copper, having the thickness smaller than the depth of the grooves, and a low-expansion metal layer 140, which is a metal layer having a heat expansion coefficient smaller than that of the copper layer, formed on the copper layer.
