Interface that allows testing and using memory modules in computer systems not designed for the modules

What is claimed is:

1. A memory module interface for use in a computer system, the interface comprising: a memory module; an interposer card having a memory module connection mechanism and a computer system connection mechanism, the memory module connection mechanism connecting the memory module to the interposer card, the computer system connection mechanism allowing the interposer card to be connected to a computer system; a first detection device electrically attached to the interposer card, the first detection device comprising a plurality of address connections, each address connection of the first detection device being coupled to power of ground, at least one address connection of the first detection device being coupled to power, said plurality of address connections collectively providing information that allows the computer system to access the memory module, and a second detection device comprised by the memory module, the second detection device comprising a plurality of address connections, each address connection of the second detection device being coupled to the ground.

2. The interface of claim 1 wherein the first detection device comprises a first Serial Presence Detect (SPD) device, and wherein the second detection device comprises a second SPD device.

3. The method of claim 1, wherein each motherboard memory module connection comprises a group of detection device address lines, wherein each group comprises a plurality of detection device address lines, wherein each of the groups of detection device address lines has a unique address created by coupling the detection device address lines in each of the groups to unique combinations of ground and power.

4. The interface of claim 2 wherein the first SPD device comprises at least one configuration data, the at least one configuration data describing configuration of the memory module, and wherein each of the at least one configuration data is one byte of data.

5. The interface of claim 2 wherein the computer system connection mechanism comprises a plurality of fingers, and wherein each of the plurality of address connections of the first SPD device is coupled to one of the fingers.

6. The interface of claim 4 wherein: the memory module comprises a Small Outline Dual In-line Memory Module (SODIMM) comprising the second SPD device electrically coupled to the SODIMM, the second SPD device comprising three address connections, wherein the SODIMM couples each of the three address connections of the second SPD device to ground; the at least one configuration data is a plurality of configuration data; the first SPD device comprising timing and size information in the plurality of configuration data to allow the computer system to access the SODIMM; and the computer system connection mechanism is a Dual In-Line Memory Module edge connector.

7. The interface of claim 5 wherein the first SPD device further comprises a serial data connection coupled to one of the plurality of fingers, the serial data connection allowing the computer system to read information in the at least one configuration data from the first SPD device.

8. A computer system for testing memory modules, the computer system comprising: at least one processor; a plurality of motherboard memory module connections coupled to the at least one processor, each motherboard memory module connection comprising a group of detection device address lines, wherein each group comprises a plurality of detection device address lines, wherein each of the groups of detection device address lines has a unique address created by coupling the detection device address lines in each of the groups to unique combinations of ground and power; a memory module, the memory module comprising a first detection device; an interposer card, the interposer card connected to one of the plurality of motherboard memory module connections through a computer system connection mechanism and connected to the memory module, the interposer card comprising a second detection device electrically coupled to the interposer card and providing information that allows the computer system to access the memory module, and wherein the at least one processor accesses the second detection device to determine configuration of the memory module, wherein the detection device on the memory module comprises three address connections that are all coupled to ground.

9. The computer system of claim 8 wherein the second detection device comprises a plurality of configuration data that describes configuration of the memory module.

10. The computer system of claim 8 wherein: the memory module comprises a Small Outline Dual In-line Memory Module (SODIMM); the plurality of motherboard memory module connections are Dual In-Line Memory Module (DIMM) sockets; and the computer system connection mechanism is a Dual In-Line Memory Module edge.

11. The computer system of claim 8 wherein the at least one processor executes a memory diagnostics program, the memory diagnostic program testing the memory module for errors.

12. The method of claim 8, the first detection device comprising at least one address connection, each address connection of the first detection device being coupled to power or ground, at least one address connection of the first detection device being coupled to power.

13. The computer system of claim 9 wherein the second detection device is a Serial Presence Detect (SPD) device and wherein each of the plurality of configuration data is one byte of data.

14. The computer system of claim 13 wherein the second SPD device further comprises a serial data connection coupled to the processor, the serial data connection allowing the processor to read information in the plurality of configuration data from the SPD device.

15. The computer system of claim 14 wherein the plurality of configuration information comprises size and timing information for the memory module.

16. A method for interfacing a memory module within a computer system, the method comprising the steps of: p1 providing the computer system having a plurality of motherboard memory module connections; providing a memory module comprising a first detection device, the first detection device comprising at least one address connection each, address connection of the first detection device being coupled to ground; providing an interposer card having a motherboard memory module connection mechanism and a computer system connection mechanism, the interposer card also comprising a second detection device electrically attached to the interposer card, the second detection device providing information that allows the computer system to access the memory module, the second detection device comprising at least one address connection, each address connection of the second detection device being coupled to power or ground, at least one address connection of the second detection device being coupled to power; connecting the memory module to the interposer card; connecting the interposer card to one of the motherboard memory module connections of the computer system; accessing the second detection device to determine a configuration of the memory.

17. The method of claim 16 wherein the second detection device comprises a plurality of data and further comprising the step of: programing at least some of the plurality of data of the second detection device of the interposer card such that the second detection device comprises configuration information for the memory module.

18. The method of claim 16 wherein the step of accessing the memory module comprises the steps of: providing a memory diagnostic program; and testing the memory module with the memory diagnostic program.

19. The method of claim 16 wherein: the memory module comprises a Small Outline Dual In-line Memory Module (SODIMM) the motherboard memory module connection into which the interposer card is connected is a Dual In-Line Memory Module (DIMM) socket.

20. The method of claim 17 wherein the first detection device is a Serial Presence Detect (SPD) device comprising a plurality of first data, wherein the second detection device is a SPD device comprising a plurality or second data, and wherein the step of programing further comprises the steps of: reading the plurality of first data from the first SPD device; and programing this plurality of first data into the second SPD.

21. The method of claim 1, wherein the memory module connection mechanism comprises a group of detection device address lines, wherein the group comprises a plurality of detection device address lines, wherein the group of detection device address lines has a unique address created by coupling the first detection device address lines in the group to unique combinations of ground and power.

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BACKGROUND OF THE INVENTION

1. Technical Field

This invention relates to the field of memory modules. More specifically, the invention relates to an interface that allows testing and using in-line memory modules in computer systems not designed for the modules.

2. Background Art

All computer systems use some type of volatile memory that only maintains its contents when the computer system is on. To maintain flexibility and allow memory to be upgraded, changed, or added, most memory comes on cards. These cards then are connected to the computer system through connectors. A popular version of these types of cards are called "In-Line Memory Modules" (IMMs). These IMMs are thin cards that have a male edge connector. The edge connector has a number of copper runs on both sides, and the copper runs are connected to lines, which are in turn connected to the memory chips and other necessary chips on the IMM. The edge connector fits into a female socket that has corresponding copper runs or tabs that match with and connect to the copper tabs on the IMM.

With this type of memory system, memory may easily be added, removed, or changed. Nonetheless, there are times when a memory module cannot be used or tested in particular computer systems.

What is needed is a device that allows memory modules that cannot be used in particular computer systems to be used in those systems.

DISCLOSURE OF INVENTION

Before proceeding to a discussion of the current invention, a more detailed discussion of the problem is beneficial. As is known in the art, many In-Line Memory Modules (IMMs) contain Serial Presence Detect (SPD) modules. In particular, Dual IMMs (DIMMs) contain SPD modules, as do Small Outline DIMMs (SODIMMs). These SPD devices contain a variety of configuration information that allow the computer system to determine how large the memory module is, how fast the memory is, etc.

Laptops and other small computers generally use IMMs that are slightly different than normal IMMs used in, for example, personal computers, servers, or workstations.

Because the latter are generally in large boxes where space is only a minor consideration, the physical size of memory can be relatively large. For laptops, on the other hand, the physical size of the memory is very important, as there is limited space in a laptop. Consequently, IMMs for laptops and other computers (such as hand-helds) are smaller than are IMMs for "large" computers. For example, DIMMs are very popular for personal computers, workstations, and servers. The equivalent memory for laptops is a smaller version of DIMMs, called SODIMMs. These SODIMMs also have less copper tabs (144 instead of 168 on the DIMMs) and thus require a smaller memory expansion slot.

Another difference between large and small computer systems is the number of motherboard memory module connections. In general, a large computer will have several expansion slots for IMMs. These slots are commonly labeled "Slot 0", "Slot 1", etc. To accommodate these extra slots, large computers will assign different addresses to the SPD device on each IMM. To do this, the address lines for the SPD device are tied to a combination of ground or power prior to where the address lines connect to the IMMs.

Small computers, on the other hand, have only one or at most two motherboard memory module connections. Accordingly, the address lines to the SPD on each IMM are tied to a constant voltage line, normally ground.

A problem occurs when the IMMs for small computers, such as SODIMMs, arrive before the portable computer arrives. Because the design of laptop and other small computers tend to lag larger computer design, the IMMs for small computers arrive before the small computers themselves arrive. This means that there are no actual computer systems with which to test the new IMMs, as the smaller IMMs do not fit into the memory slots for the larger computers. For instance, 133 Megahertz (MHz) computer memory is currently available for laptops, but there are few or no laptops that support this speed of memory. Although there are test systems that allow the memory to be tested, test system timing is normally different than real computer system timing. Because of this, it is beneficial to test the cards in an actual computer system environment.

Even if one could create an interposer card that allows the SODIMMs to fit into the interposer and then into the DIMM slot, a SODIMM would only work in Slot 0 because the addresses on the SODIMM for the SPD are grounded. When the large computer first starts up, it tries to determine if the memory slots have memory in them. The computer system communicates with each SPD device on each DIMM in each slot. Essentially, the Basic Input Output System (BIOS) causes the processor to attempt to communicate with the SPD devices through a serial connection to which each device is connected. The processor sends a series of bits to the SPD devices over the serial connection, and the series of bits contains an SPD address. As stated previously, each SPD device should have a different address. The processor will search an SPD device at one of the addresses by sending out a command for one of the addresses, and then waiting for a response.

If the computer receives an appropriate answer from a DIMM, it knows that the slot contains a memory module. Then the computer will go about reading configuration information from the SPD to enable the computer to properly access the memory. If, however, the computer system does not receive a proper response, then the computer system will assume that this slot does not contain a memory module. When the computer system would access the SPD on the SODIMM (on the interposer) in a slot other than Slot 0, the SPD will respond, essentially, that it is in Slot 0. This response occurs because all of its SPD address pins are grounded, which indicates that it is in slot zero. Thus, even if an interposer could be developed to allow SODIMMs to be placed in a DIMM slot, this interface could only be placed in Slot 0. When an engineer goes to test hundreds of SODIMMs, this limitation seriously impedes how quickly the testing can be performed.

To overcome these problems, the current invention provides an interface that allows testing and using in-line memory modules in computer systems not designed for the modules. In particular, an interface of the present invention comprises an interposer card that fits into a motherboard memory module connection of a computer system. The interposer card also has a motherboard memory module connection system into which a memory module fits. Additionally, the interposer card contains a detection device that describes the configuration of the memory module. This allows the computer system to properly access the memory module.

When used as part of a computer system, the interface allows memory modules to be tested by a memory diagnostics program. Moreover, the interface may be placed in any slot in the computer, even though the memory module itself only supports being placed in one particular slot.

Thus, the interface of the current invention allows memory modules to be tested and used in computers that do not normally support a particular form of memory module.

The foregoing and other features and advantages of the present invention will be apparent from the following more particular description of preferred embodiments of the invention, as illustrated in the accompanying drawings.

BRIEF DESCRIPTION OF DRAWINGS

Preferred embodiments of the present invention will hereinafter be described in conjunction with the appended drawings, where like designations denote like elements, and:

FIG. 1 is a perspective view of a computer system in accordance with a preferred embodiment of the current invention;

FIG. 2 is a front view of a memory module, an interposer card, and a motherboard memory module connection in accordance with a preferred embodiment of the present invention;

FIG. 3 is a top view of an interposer card in accordance with a preferred embodiment of the present invention;

FIG. 4 is a portion of an interposer card shown in accordance with a preferred embodiment of the present invention;

FIG. 5 is a method for interfacing a memory module with a computer system and for testing the interfaced memory module, in accordance with a preferred embodiment of the present invention; and

FIG. 6 is an example of some of the bytes used in a serial presence detect device that provide information about a memory module.

BEST MODE(S) FOR CARRYING OUT THE INVENTION

To solve these problems, the current invention provides an interface that allows testing and using in-line memory modules in computer systems not designed for the modules. In particular, an interface of the present invention comprises an interposer card that fits into a motherboard memory module connection of a computer system. The interposer card also has a motherboard memory module connection system into which a memory module fits. Additionally, the interposer card contains a detection device that describes the configuration of the memory module. This allows the computer system to properly access the memory module.

When used as part of a computer system, the interface allows memory modules to be tested by a memory diagnostics program. Moreover, the interface may be placed in any slot in the computer, even though the memory module itself only supports being placed in one particular slot.

Thus, the interface of the current invention allows memory modules to be tested and used in computers that do not normally support the memory modules.

In particular, for Small Outline Dual In-Line Memory Modules (SODIMMs), these memory modules use a 144 pin connection system. Additionally, they contain a detection device commonly called a Serial Presence Detect (SPD) device, which is normally an Electrically Programmable Read Only Memory (EPROM), that contains configuration information. This configuration information, as is well known in the art, allows the computer to properly access the memory module. Because these memory modules are normally used in laptops and other small computers requiring small memory module sizes, the address lines going to the SPD device are grounded. This grounding occurs directly on the memory module, and is useful because these small computers only contain one or two motherboard memory module connections, such as SODIMM sockets. If more than one memory module needs to be accessed, methods other than SPD address bits are used to access the memory modules.

When these SODIMMs are placed in computer systems not designed for them, the SODIMMs may only be placed in one particular slot, commonly called Slot 0. Because of this, only one SODIMM may be tested and used at one time. This results in excessive test time. These concepts will be more completely discussed in reference to the figures.

Turning now to FIG. 1, this figure shows a perspective view of a computer system operating in accordance with a preferred embodiment of the current invention. Computer system 100 comprises a case 930, a motherboard 130, a processor 920 having a memory 940, motherboard memory module connections 910, 911, 912, and 913, SPD address lines 950, 951, 952, and 953, and memory module interface 100. Memory module interface 100 comprises an interposer card 120 and a memory module 110. Interposer card 120 comprises a motherboard memory module connection system 750 and a detection device 165, which is a SPD device. Memory module 110 comprises a number of memory chips 180, 181, 182, and 187, and a detection device 170, which is a SPD device 170. It should be noted that memory module 110 could have additional memory chips on the side that is not shown in FIG. 1.

Detection devices for use with the current invention may be any detection device that allows a computer to access a memory module. To be able to access a memory module, the computer system would preferably determine at least the speed and size of the memory module. Any detection device that allows a computer system to do this is suitable for use with the current invention. As an example of this, a group of lines that are tied to specific potentials could be used as a detection device. For instance, if there are four lines, there could be 16 different combinations of potentials. Each combination would then determine the type of memory module, such as a "0010" could mean a 64 megabyte, 100 megahertz synchronous Dynamic Random Access Memory (DRAM). Because new types of memory are being created at a very rapid pace, it is preferred that the detection devices contain configuration information that allow a computer to properly access a memory module. Most preferably, the detection devices are serial presence detect devices, which are an industry-standard device having well known configuration information. Because the SPD devices are the most preferred embodiment of a detection device, the SPD devices will mainly be discussed herein. However, any detection device that allows a computer system to properly access a memory module may be used with the current invention.

For large computers, the SPD address lines going to the motherboard memory module connections 910 through 914 have unique addresses created by coupling the SPD address lines to unique combinations of power and ground. For instance, SPD address lines 950 are all connected to ground. These SPD address lines are commonly referred to as SAO, SA1, and SA2, where SA0 is the least significant bit. Thus, motherboard memory module connection 913, which in this example is a 168 pin DIMM socket, will be address zero. This DIMM socket is commonly called Slot 0. SPD address lines 951, on the other hand, have SAO tied to power and SA1 and SA2 tied to ground. This means that the address of the motherboard memory module connection 912 will be address one. This DIMM socket is commonly called Slot 1. Similarly, SPD address lines 952 have SA1 tied to power and SAO and SA2 to ground, while SPD address lines 953 have SAO and SA1 tied to power and SA2 tied to ground. Thus, motherboard memory module connection 911 is address two (DIMM Slot 2), while motherboard memory module connection 910 is address three (DIMM Slot 3).

Therefore, for large computers, each motherboard memory module connection is able to be accessed independently. However, the memory made for small computer systems generally has its SPD address lines grounded because small computer system only supports one (at most two) memory modules. Turning briefly to FIG. 2, memory module 110 is shown in a larger view. Memory module 110 comprises an SPD 170 that has SPD address lines 186. These address lines, as indicated in FIG. 2 are grounded. Returning to FIG. 1, when an interposer 120 is used to connect memory module 110 to motherboard 130, without SPD 165, the interface 100 may only be placed in address zero because the SPD 170 has its SPD address lines grounded. When computer system 900 starts up, processor 920 will execute commands that test the memory in motherboard memory module connections 910 through 904. Computer system 900 will attempt to access each SPD on each memory module in each motherboard memory module connection 910 through 904. When the processor 920 accesses SPD 170 on memory module 110 (this assumes that SPD 165 is not on interposer card 120), the computer system will be able to access the SPD because the SPD believes that it is tied to address zero or Slot 0.

However, if interface 100 (without SPD 165) is placed into motherboard memory module connection 912, the computer system will not be able to access the memory module 110. This error happens because SPD 170 has its SPD address lines grounded. Thus, from the perspective of SPD 170, it is at address zero. The computer is attempting to access the SPD at address one (Slot 1). Normally, a DIMM placed into motherboard memory module connection 912 would have an SPD that accepts its SPD address from SPD address lines 951. An SPD on a DIMM would therefore determine that it was address one and would respond to the computer system 900. Because a SODIMM has its