A power converter with synchronous rectifying through the control of a current transformer is disclosed. The basic architecture of the power converter includes a flyback transformer (10), a switch controller (20) and a current transformer (30). The secondary winding of the flyback transformer (10) is connected to the primary winding of the current transformer (30) used to control the switch controller (20). The primary winding of the current transformer (30) is connected to a synchronous rectifying switch (Q7). If a current change occurs on the secondary winding of the flyback transformer (10), the current transformer (30) detects the phase change and enables the switch controller (20) to switch off the synchronous rectifying switch (Q7). The current transformer (30) turns off the synchronous rectifying switch (Q7) anticipatorily in the continuous current output mode to prevent any power loss from crossovers.
The proposed DC/AC power converter for transforming a DC input source to an AC output source includes a transformer having a primary and a secondary windings, a switch network having a first switch electrically connected between the DC input source and the primary winding, a two-way current-transmitting module electrically connected between the secondary winding and the AC output source and a controllable conducting circuit electrically connected to the secondary winding. In which, the controllable conducting circuit is conducting when the two-way current-transmitting module transmits an electrical energy from the primary winding to the secondary winding and a current flowing through the primary winding is decreasing so as to lower down a voltage stress of the first switch of the switch network.
An undershoot eliminator circuit is disclosed that avoids the occurrence of a negative undershoot that typically happens when an isolated DC-DC converter with a secondary side synchronous driver that is turned off. The undershoot eliminator circuit functions to discharge an energy storage element in an auxiliary supply on said secondary side of said converter. The circuit includes a clamp transistor having a gate terminal, a source terminal, and a drain terminal, the drain terminal of the transistor connected to said storage element, the source terminal of the transistor connecting to the output of the converter; means for trapping charge on the gate terminal of the clamp transistor while said converter is on; and means for coupling the voltage on the output of the converter to the gate terminal, such that, when said converter goes off and its output voltage begins to drop, the trapped charge causes the gate-to-source voltage of the clamp transistor to increase until the gate of the transistor is sufficiently saturated to cause it to turn on for a sufficient time to discharge the storage element. The undershoot eliminator circuit preferably employs a capacitor for trapping a charge on the gate terminal of the clamp transistor. The storage capacitor is quickly discharged to avoid a negative undershoot from occurring when the DC/DC power converter is turned off.
Disclosed herein is a flyback converter with a synchronous rectifier which is applied to a power supply of a portable computer such as a notebook PC. The flyback converter is operated in a critical conduction mode to turn on/off a main switch at a zero crossing point of an output voltage. The flyback converter is also adapted to supply a driving voltage to a synchronous switch using the output voltage. Therefore, there is no need for a secondary auxiliary coil of a transformer and for a Schottky diode to be connected in parallel with the synchronous switch, resulting in simplification in circuit design.
In one embodiment, a power supply controller generates a PWM control signal that is subsequently used to control a portion of current flow in a primary side of a power supply system. THE PWM control signal is coupled to a secondary of the power supply system and used to control a synchronous rectifier that is coupled within the secondary side.
In one embodiment, a secondary-side controller is configured to detect a burst-mode of operation and responsively block or prevent sending drive pulses to a power transistor that is coupled in the secondary side.