Correcting a signal offset may include observing a finite duration signal y.sub.n that comprises a representation of a mixture of a desired signal that may include data of interest, and an undesired signal based on interference of an external interference source. The undesired signal may include an offset component which may be modeled as comprising a step function u defined by unknown step function parameters. The unknown step function parameters may be estimated using, for example, a maximum likelihood method. Thereafter, y.sub.n may be corrected based on the estimated step function parameters.
An analog-to-digital converter ("ADC") architecture as described herein utilizes a digital signal processor having suitably configured waveform prediction logic that can predict expected types of input signals. The ADC architecture subtracts the predictable signal components from the analog input signal prior to the analog-to-digital conversion, which extends the dynamic range of the ADC employed by the ADC architecture. In practice, the ADC architecture can subtract predictable strong signal components from an analog input signal such that the ADC can apply its available dynamic range to the remaining weak signal components.
