Analog buffers with a precise gate to source voltage compensation and a small DC offset, by storing an input offset voltage to be used as an output offset voltage to reverse the offset in the input. A first source follower at the input end and a second source follower at the output end are both coupled to a switching circuit, wherein the first follower provides an input offset voltage (e.g., |Vgsp|) based on the input voltage (Vin), the second source follower provides an output voltage (Vout) by compensating Vin transmitted through the analog buffer circuit with an output offset voltage (|Vgsn|), and the switching circuit stores and equalizes the output offset voltage to the input offset voltage (|Vgsp|=|Vgsn|), so to obtain an output Vout that is identical to Vin.

A source follower is disclosed. A driving transistor comprises a first gate receiving an input signal. An active load is connected to the driving transistor in series between a first voltage source and a second voltage source and coupled to the driving transistor at a first point. A first switch is coupled between the first voltage source and the first gate. A first capacitor is coupled to a second switch at a second point. A third switch is connected to the first capacitor at a third point and connected to the second switch and the first capacitor in series between the first gate and the second voltage source. A fourth switch is coupled between the third point and the first point. A fifth switch is coupled between the first point and a fourth point.

Signal driving circuits with high driving capability and precise analog output voltage level, by outputting analog voltages through analog buffers and directly outputting voltages from digital-to-analog converters in turn. A digital-to-analog converter generates a first analog voltage according to digital data. An output circuit selectively either outputs a second analog voltage according to the first analog voltage by an analog buffer to a load or outputs the first analog voltage to the load directly.

An analog output buffer circuit for a flat panel display is provided for improving an output signal distortion. The circuit includes a transistor, a current source, an input capacitor, an upper switch, a lower switch, a first switch, a second switch and a third switch. In which, the transistor and the current source are electrically connected in series between a first power supply and a second power supply. The current source provides a compensatory current for the transistor when a leakage current occurs. The upper switch and the first switch are turned on during the first period, and the lower switch and the second switch are turn on during the second period, in which the second period is after the first period. Those switches eliminate the drawback of different voltage levels between the input signal and the output signal obtained from the output buffer circuit inputted by the input signal.

An analog buffer used in a source driver is provided. The analog buffer havs an input end, an output end, a transistor, first and second capacitors, first, second, third, fourth and fifth switches. The source and the drain of the transistor is coupled to the output end and receives a first voltage respectively. The first end of the first and the second capacitors are coupled to the gate of the transistor. The second end of the first and the second capacitors are coupled to the first end of the first, second and fourth switches and the first end of the third and fifth switches respectively. The second end of the first switch receives a second voltage. The second end of the second and third switches are coupled to the input end. The second end of the fourth and fifth switches are coupled to the output end.