System and method for protecting a power converter. The system includes a first comparator configured to receive a threshold signal and a first signal and to generate a comparison signal. The first signal is a sum of a second signal and a third signal, and the third signal is associated with an input current for a power converter. Additionally, the system includes a pulse-width-modulation generator configured to receive the comparison signal and generate a modulation signal in response to the comparison signal, and a switch configured to receive the modulation signal and control the input current for the power converter. An amplitude for the first signal becomes larger if an amplitude for the input voltage becomes larger. The second signal is generated by receiving an input voltage for the power converter, converting the received input voltage to a fourth signal, and converting the fourth signal to the second signal.

A switching power supply device has a boost power converter which converts a wide range of AC input voltages into a DC voltage larger than an amplitude of the AC input voltage to supply to a DC-DC converter. The switching power supply device includes a load detection circuit, an input voltage detection circuit, and a power conversion controller for the boost power converter. The power conversion controller corrects the determination reference value in accordance with the AC input voltage detected in the input voltage detection circuit. When a light load is detected based on a comparison between the corrected determination reference value and the detection value output from the load detection circuit, the controller disables the boost power converter.

A circuit for calibrating an oscillating ramp signal to a variable DC reference signal in accordance with an embodiment of the present application includes a circuit for setting a predetermined time period during which a charging capacitor can charge and thus determining a ramp oscillator frequency; a variable current source for providing a charging current to the charging capacitor; a circuit for selecting the charging current fed by the variable current source to said charging capacitor; and a circuit for comparing the oscillating ramp signal to the variable DC reference signal and for supplying a signal to the selecting circuit for controlling the amount of current supplied to said charging capacitor thereby determining the charging voltage across said capacitor at the end of said predetermined time period.

Alteration of voltage input to a voltage regulator output stage from a V.sub.bus regulator stage in a two-stage voltage regulator provides optimal V.sub.bus voltage placement for a wide range of current loads to increase voltage regulator efficiency and is particularly suited to CPUs having power-saving sleep modes of operation. An optimal voltage is selected or developed in response to information concerning operational mode or current consumption of the powered device. As a perfecting feature of one embodiment of the invention in which a discrete V.sub.bus voltage is selected based on operational mode, the selected voltage is adjusted to further optimize the matching of the V.sub.bus voltage placement to the load and provides a continuous range of voltages. In a second embodiment the entire V.sub.bus positioning function is performed in response to current load information. A feed-forward arrangement is provided to avoid transient spikes as the V.sub.bus voltage placement is altered.