|
|  Custom CD of patents similar to US6910812 : Small-scale optoelectronic package - $19.95 |
| United States Patent | 6910812 |
| Link to this page | http://www.wikipatents.com/6910812.html |
| Inventor(s) | Pommer; Richard (San Clemente, CA), Kuznia; Charles B. (Encinitas, CA), Le; Tri Q. (San Diego, CA), Hagen; Richard T. (Mission Viejo, CA), Reedy; Ronald E. (San Diego, CA), Cable; James S. (San Diego, CA), Albares; Donald J. (San Diego, CA), Miscione; Mark (Ramona, CA) |
| Abstract | An integrated circuit/optoelectronic packaging system (100) which comprises
OE and IC components packaged to provide electrical input/output, thermal
management, an optical window, and precise passive or mechanical alignment
to external optical receivers or transmitters. A transparent insulating
substrate having electrical circuitry in a thin silicon layer formed on
its top side is positioned between the optical fiber and the
optoelectronic device such that an optical path is described between the
optoelectronic device and the optical fiber core through the transparent
insulating substrate. The optoelectronic devices are mounted on the
transparent insulating substrate in a precise positional relationship to
guide holes in the substrate. The optical fibers are fixed in an optical
fiber connector and are held in a precise positional relationship to guide
holes in the connector. Alignment is accomplished with complementary guide
pins that pass through guide holes in the fiber optic connector and in the
transparent substrate. |
| |
|
Title Information  |
|
|
| Inventor |
Pommer; Richard (San Clemente, CA) , Kuznia; Charles B. (Encinitas, CA) , Le; Tri Q. (San Diego, CA) , Hagen; Richard T. (Mission Viejo, CA) , Reedy; Ronald E. (San Diego, CA) , Cable; James S. (San Diego, CA) , Albares; Donald J. (San Diego, CA) , Miscione; Mark (Ramona, CA) |
|
|
|
| Publication Date |
June 28, 2005 |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| Parent Case |
CROSS-REFERENCE TO RELATED APPLICATIONS
This application claims the priority of U.S. Provisional Patent
Applications Ser. Nos. 60/291,348, filed May 15, 2001; 60/303,695, filed
Jul. 6, 2001; 60/304,387, filed Jul. 9, 2001; 60/335,021, filed Oct. 31,
2001; and 60/365,599, filed Mar. 18, 2002. |
|
|
|
|
|
|
|
|
|
|
|
|
|
Title Information  |
|
|
References  |
|
|
| *references marked with an asterisk below are user-added references |
|
U.S. References |
|
|
| Add a new US reference: |
| | Reference | Relevancy | Comments | Reference | Relevancy | Comments | 6600853 Wickman et al.
Jul,2003 |      Your vote accepted [0 after 0 votes] | | 6526206 Kunkel et al.
Feb,2003 |      Your vote accepted [0 after 0 votes] | | 6450704 O'Connor et al.
Sep,2002 |      Your vote accepted [0 after 0 votes] | | 6384473 Peterson et al.
May,2002 |      Your vote accepted [0 after 0 votes] | | 2002/0021874 Giboney et al.
Feb,2002 |      Your vote accepted [0 after 0 votes] | | 6349159 Uebbing et al.
Feb,2002 |      Your vote accepted [0 after 0 votes] | | 6318909 Giboney et al.
Nov,2001 |      Your vote accepted [0 after 0 votes] | | 6302590 Moore
Oct,2001 |      Your vote accepted [0 after 0 votes] | | 2001/0021287 Jewell et al.
Sep,2001 |      Your vote accepted [0 after 0 votes] | | 6246708 Thornton et al.
Jun,2001 |      Your vote accepted [0 after 0 votes] | | 6243508 Jewell et al.
Jun,2001 |      Your vote accepted [0 after 0 votes] | | 6234687 Hall et al.
May,2001 |      Your vote accepted [0 after 0 votes] | | 6227720 Isaksson
May,2001 |      Your vote accepted [0 after 0 votes] | | 6137929 Rosenberg et al.
Oct,2000 |      Your vote accepted [0 after 0 votes] | | 6130979 Isaksson et al.
Oct,2000 |      Your vote accepted [0 after 0 votes] | | 6075908 Paniccia et al.
Jun,2000 |      Your vote accepted [0 after 0 votes] | | 6056448 Sauter et al.
May,2000 |      Your vote accepted [0 after 0 votes] | | 6034808 Isaksson
Mar,2000 |      Your vote accepted [0 after 0 votes] | | 6018249 Akram et al.
Jan,2000 |      Your vote accepted [0 after 0 votes] | | 6014476 Meyer-Guldner et al.
Jan,2000 |      Your vote accepted [0 after 0 votes] | | 5815623 Gilliland et al.
Sep,1998 |      Your vote accepted [0 after 0 votes] | | 5781682 Cohen et al.
Jul,1998 |      Your vote accepted [0 after 0 votes] | | 5768456 Knapp et al.
Jun,1998 |      Your vote accepted [0 after 0 votes] | | 5771218 Feldman et al.
Jun,1998 |      Your vote accepted [0 after 0 votes] | | 5631988 Swirhun et al.
May,1997 |      Your vote accepted [0 after 0 votes] | | 5574744 Gaw et al.
Nov,1996 |      Your vote accepted [0 after 0 votes] | | 5574814 Noddings et al.
Nov,1996 |      Your vote accepted [0 after 0 votes] | | 5159413 Calviello et al.
Oct,1992 |      Your vote accepted [0 after 0 votes] | | |
|
|
|
|
U.S. References |
|
|
Foreign References |
|
|
|
|
|
|
Foreign References |
|
|
Other References |
|
|
| Add a new Other reference: |
| Post related web sites and other references in this section |
| | Reference | Relevancy | Comments | Wolf, Stanley D., Tauber, Richard N. 1986. Silicon Processing for the VLSI Era. vol. 1: Process Technology, 473-476.
. May,2007 |      Your vote accepted [0 after 0 votes] | | Wolf, Stanley D. 1990. Silicon Processing for the VLSI Era. vol. 2: Process Integration, 376-380.
. May,2007 |      Your vote accepted [0 after 0 votes] | | Liu, et al. Ultralow-Threshold Sapphire Substrate-Bonded Top-Emitting 850-nm VCSEL Array. IEEE Photonics Technology Letters, vol. 14, No. 9, Sep. 2002.
. May,2007 |      Your vote accepted [0 after 0 votes] | | Pu, et al. Hybrid Integration of VCSEL's to CMOS Integrated Circuits. IEEE Journal of Selected Topics in Quantum Electronics, vol. 5, No. 2, Mar./Apr. 1999.
. May,2007 |      Your vote accepted [0 after 0 votes] | | Rosenberg, et al. The PONI-1 Parallel-Optical Link. 49.sup.th Electronic Components & Technology Conference, San Diego, CA Jun. 1-4, 1999.
. May,2007 |      Your vote accepted [0 after 0 votes] | | Element Parallel Array Optical Coupler. Webpage for OCLI, A JDS Uniphase Company, Nov. 2001.
. May,2007 |      Your vote accepted [0 after 0 votes] | | OptoCube 40. Webpage for Corona Optical Systems, Inc., Mar. 2002.. May,2007 |      Your vote accepted [0 after 0 votes] | | |
|
|
|
|
Other References |
|
|
|
|
|
References  |
|
|
|
|
|
|
|
|
|
|
|
Public's "Guesstimation" of Royalty Value
| |
|
|
|
|
|
|
|
|
|
|
|
|
Market Review  |
|
|
Technical Review  |
|
|
Claims  |
|
|
What is claimed is:
1. An integrated circuitry and optoelectronic packaged assembly, comprising: a transparent insulating substrate having first and second surfaces generally parallel to one
another, at least one optoelectronic device bonded to said first surface of the transparent insulating substrate by flip-chip bonds of less than about 25 .mu.m in height, such that said at least one optoelectronic device is optically accessible to
optical signals through said substrate; electrical circuit structure at the first surface operatively coupled to the at least one optoelectronic device; at least one optical receiver or transmitter on the second surface of the transparent insulating
substrate, wherein said optical receiver or transmitter comprises one or more alignment elements; mechanical alignment members on said second surface of the transparent insulating substrate, for engaging the alignment elements of said optical receiver
or transmitter; and at least one alignment reference feature on the first surface of the transparent insulating substrate, wherein an optical path is formed between said optoelectronic device and said optical receiver or transmitter through said
transparent insulating substrate, and wherein said optical path is free of any optical lens.
2. The assembly of claim 1, wherein the electrical circuit structure includes components selected from the group consisting of electrical circuit devices and connections.
3. The assembly of claim 1, wherein the electrical circuit structure is formed in a thin silicon layer on the first surface.
4. The assembly of claim 1, wherein the electrical circuit structure is formed in an integrated circuit chip that is flip-chip bonded to the first surface.
5. The assembly of claim 1, wherein the mechanical alignment members on said second surface comprise guide pins.
6. The assembly of claim 1, wherein the electrical circuit structure comprises a CMOS circuit.
7. The assembly of claim 1, wherein said substrate is formed of sapphire and the electrical circuit structure comprises an ultrathin silicon-on-sapphire CMOS circuit.
8. The assembly of claim 1, wherein the at least one alignment reference feature comprises at least one alignment mark on the first surface.
9. The assembly of claim 1, wherein the at least one alignment reference feature comprises photolithographically formed indicia.
10. The assembly of claim 1, wherein the at least one alignment reference feature comprises at least one feature of the electrical circuit structure.
11. The assembly of claim 1, further comprising a support member.
12. The assembly of claim 11, further comprising a heat sink mounted on said support member.
13. The assembly of claim 11, wherein the substrate is secured to the support member by conductive bonds.
14. The assembly of claim 13, wherein the support member has an open area beneath the substrate secured thereto, for optical access to said at least one optoelectronic device.
15. The assembly of claim 14, further comprising a heat sink mounted on said support member.
16. The assembly of claim 15, wherein the heat sink is secured to the support member try adhesive bonds.
17. The assembly of claim 16, wherein the assembly is environmentally sealed by the adhesive bonds securing the heat sink to the support member and by the conductive bonds securing the substrate to the support member.
18. The assembly of claim 17, wherein the mechanical alignment members comprise guide pins extending outwardly from the second surface.
19. The assembly of claim 18, wherein the guide pins are engaged in complementary guide holes of a fiber optic connector.
20. The assembly of claim 18, further comprising electrical contact elements on the support member.
21. The assembly of claim 20, wherein the electrical contact elements comprise solder bumps.
22. The assembly of claim 1, wherein the flip-chip bonds are less than about 20 .mu.m in height.
23. The assembly of claim 1, wherein the flip-chip bonds comprise gold-gold bump bonds.
24. An optical/optoelectronic coupling system comprising: an optical fiber disposed in an optical fiber connector, wherein: the optical fiber connector has a first alignment means comprising a pair of guide holes; and the optical fiber is held
in a precise positional relationship to the first alignment means; an optoelectronic device mounted on a transparent insulating substrate by flip-chip bonds of less than about 25 .mu.m in height, wherein; the transparent insulating substrate has
substantially parallel top and bottom surfaces and is positioned between the optical fiber and the optoelectronic device such that an optical path is provided between the optoelectronic device and the optical fiber through the transparent insulating
substrate, passing through the top and bottom surfaces; said optical path is free of any optical lens; the transparent insulating substrate has a second alignment means comprising a pair of guide holes corresponding to the first alignment means; the
optoelectronic device is mounted on the transparent insulating substrate in a precise positional relationship to the second alignment means; and alignment members comprising a pair of guide pins complementary to the first and second alignment means,
whereby the optical fiber and optoelectronic device are aligned when the alignment members are coupled with the first and second alignment means.
25. The optical/optoelectronic coupling system of claim 24, wherein the optoelectronic device is in electrical communication with electrical circuitry on the transparent insulating substrate.
26. The optical/optoelectronic coupling system of claim 25, wherein the electrical circuitry is present in a thin silicon layer on the transparent insulating substrate.
27. The optical/optoelectronic coupling system of claim 25, wherein the electrical circuitry is flip-chip bonded to the transparent insulating substrate.
28. The optical/optoelectronic coupling system of claim 24, wherein the transparent insulating substrate is selected from the group consisting of sapphire and glasses.
29. The optical/optoelectronic coupling system of claim 24, wherein the transparent insulating substrate is sapphire and the thin silicon layer is an ultrathin silicon-on-sapphire layer.
30. The optical/optoelectronic coupling system of claim 24, wherein the optoelectronic device is selected from the group consisting of lasers, photodetector, and light modulators.
31. The optical/optoelectronic coupling system of claim 24, wherein the optical fiber comprises a single mode fiber.
32. The optical/optoelectronic coupling system of claim 24, wherein the optical fiber comprises a multimode fiber.
33. The optical/optoelectronic coupling system of claim 24, further comprising an array of optoelectronic devices coupled an array of optical fibers.
34. The optical/optoelectronic coupling system of claim 24, wherein the flip-chip bonds are less than about 20 .mu.m in height.
35. The optical/optoelectronic coupling system of claim 24, wherein the flip-chip bonds comprise gold-gold bump bonds.
36. An optoelectronic assembly, comprising: a transparent substrate having first and second surfaces and at least one electrical feature; at least one optoelectronic device attached to the first surface of said transparent substrate by
flip-chip bonds of less than about 25 .mu.m in height and in electrical contact with the at least one electrical feature; at least two alignment elements on the substrate; and an optical fiber member including an optical fiber in an optical fiber
connector on the second surface of said substrate, wherein the optical fiber connector includes alignment means cooperative with said alignment elements on the substrate, wherein an optical path is formed between the optoelectronic device and the optical
fiber through the transparent substrate, and wherein said optical path is free of any optical lens.
37. The optoelectronic assembly of claim 36, wherein the flip-chip bonds are less than about 20 .mu.m in height.
38. The optoelectronic assembly of claim 36, wherein the flip-chip bonds comprise gold-gold bump bonds. |
|
|
|
|
Claims  |
|
|
Description  |
|
|
FIELD OF THE INVENTION
The present invention relates to a method and apparatus for coupling light between optical fibers and optoelectronic devices and aligning the optical fibers and optoelectronic devices, for coupling light therebetween, having applicability to the
manufacture of a small scale package for an optoelectronic device or arrays of such devices that provides precise alignment and efficient optical coupling.
BACKGROUND OF THE INVENTION
The disclosure of U.S. Provisional Patent Applications Ser. No. 60/291,348, filed May 15, 2001; 60/303,695, filed Jul. 6, 2001; 60/304,387, filed Jul. 9, 2001; 60/335,021, filed Oct. 31, 2001; and 60/365,599, filed Mar. 18, 2002, are hereby
incorporated herein by reference in their entireties. This application is related to U.S. patent application Ser. Nos. 09/658,259, filed Sep. 8, 2000; 60/300,129, filed Jun. 22, 2001; and Ser. No. 10/099,523, filed Mar. 15, 2002, the disclosures
of which are hereby incorporated herein by reference in their entireties.
Applications that require manipulation of many optical signals are becoming more complex and more commonplace. Such applications include the routing of signals in fiber optic networks, necessitated by, for example, telecommunications and large
volumes of internet data traffic. Large volumes of signals must be processed, transmitted to or received from optical fibers, where the optical fibers are typically present as arrays of up to 100.times.100 fibers; larger arrays are possible and may be
expected in the near future. As these optical interconnection networks become more complex and the volume of signal traffic increases, it becomes more and more important to reduce signal loss and cross-talk and to minimize the size of the
optical/optoelectronic interconnect package.
Integration of Electronic, Optoelectronic and Optical Functions
The optoelectronic devices that perform optical signal processing tasks, for example, lasers, light-emitting diodes, photodetectors, photomodulators and the like, must be efficiently interfaced with the optical fibers or waveguides used in high
speed telecommunications and data networks. Additionally, in an optical communications system, the optical signals are converted t | | |