or
Bookmark and Share
EEPROM and method of fabricating the same
   
Document Number
US Patent 6913969
Issued Date
July 5, 2005
Link
Inventors
Map
Abstract
An electrically erasable programmable read-only memory (EEPROM) comprises trench isolation regions whose upper surfaces are recessed compared with an upper surface of the semiconductor substrate, thereby allowing use of all surfaces of a protrusion of the semiconductor substrate between the isolation regions, including the upper surface of the semiconductor substrate, as an active region. Accordingly, the performance of a memory cell can be improved by increasing the size of an active channel region without needing to change the size of a planar unit cell.
Tags:
Description:
Amusing 0%
Clever 0%
Complex 0%
Efficient 0%
Historic 0%
Important 0%
Innovative 0%
Interesting 0%
Practical 0%
Simple 0%
Number of Claims:
9
Comments:
no comments yet
Published
July 5, 2005
Application Number
10/446,970
Filed
May 28, 2003
US Classification
438/248   257/300 257/E21.679 257/E27.103
Int'l Classification
H01L   27/115   (20060101)   H01L   21/70   (20060101)   H01L   21/8246   (20060101)  
Examiner
Attorney/Law Firm
Priority Data
Jul 09, 2002 [KR] 2002-39836
USPTO Field of Search
438/248  
Related Patents
7119412 - Semiconductor device and method for manufacturing the same - Owned by Fujitsu Limited (Kawasaki,JP)

After formation of a gate insulating film for a high voltage transistor on the entire surface, when removing the gate insulating film existing within a low voltage region, etching is not finished upon expose of an active region, but overetching is performed until the surface of an element isolation insulating film becomes lower by, for example, about 15 nm than the surface of the active region within the low voltage region. Then, a high-temperature rapid thermal hydrogen treatment is performed on the active region within the low voltage region. As a result of this, a natural oxide film is removed from the surface of the active region within the low voltage region, so that the flatness is increased and its corners are rounded.

7528031 - Semiconductor device and method for manufacturing the same - Owned by Fujitsu Microelectronics Limited (Tokyo,JP)

After formation of a gate insulating film for a high voltage transistor on the entire surface, when removing the gate insulating film existing within a low voltage region, etching is not finished upon expose of an active region, but over etching is performed until the surface of an element isolation insulating film becomes lower by, for example, about 15 nm than the surface of the active region within the low voltage region. Then, a high-temperature rapid thermal hydrogen treatment is performed on the active region within the low voltage region. As a result of this, a natural oxide film is removed from the surface of the active region within the low voltage region, so that the flatness is increased and its corners are rounded.

Claims
Description
About| FAQs| Terms & Disclaimer| Link to Us| Contact Us