An interconnection wiring system incorporating two levels of interconnection wiring separated by a first dielectric, a capacitor formed by a second dielectric, a bottom electrode of the lower interconnection wiring or a via and a top electrode of the upper interconnection wiring or a separate metal layer. The invention overcomes the problem of leakage current and of substrate stray capacitance by positioning the capacitor between two levels of interconnection wiring.
RELATED APPLICATION
This application is a divisional of U.S. application Ser. No. 09/318,867, filed May 26, 1999, now U.S. Pat. No. 6,635,527 which is a divisional of U.S. application Ser. No. 08/626,310, filed Apr. 1, 1996 now U.S. Pat. No. 5,926,359.
