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Ethernet packet header cache
   
Document Number
US Patent 6947971
Issued Date
September 20, 2005
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Inventors
Amos; James A. (North Canton, OH)
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Abstract
Methods and apparatus for caching information associated with packets are disclosed. According to one aspect of the present invention, a system for processing a packet includes a controller with a processor and a controller data cache, a bus, a memory interface, and a separate data cache. The memory interface may be accessed by the controller via the bus, and is arranged to be in communication with a substantially external memory. The separate data cache, which is also in communication with the controller via the bus, caches information associated with the packet such that the controller accesses the separate data cache to obtain the information associated with the packet when the controller needs to decide how to process the packet.
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Number of Claims:
29
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Owner
Cisco Technology, Inc. (San Jose, CA)
Published
September 20, 2005
Application Number
10/141,709
Filed
May 9, 2002
US Classification
709/213   709/218 709/238 711/120
Int'l Classification
G06F   13/00   (20060101)  
Examiner
Attorney/Law Firm
USPTO Field of Search
709/218   709/213   709/238   711/118   711/122   711/119   711/120  
Related Patents
7149218 - Cache line cut through of limited life data in a data processing system - Owned by International Business Machines Corporation (Armonk, NY)

A method and apparatus for a cache line cut through reduces the latency and memory bandwidth of a data processing system. By cutting through or forwarding a cache line to the next processing element, data that has been read from a local memory into a local cache and altered by a processing element need not be restored to the local memory before it is sent to its destination target processing element. By eliminating the write back to the local memory for direct write through to the destination, performance is increased because the bandwidth and latency are decreased. In a preferred embodiment, the processing elements may be contained within a network processor and the altered data may be a header in one network protocol which needs to be modified to another protocol before transfer of the data along the network. Transfer of the data may be to another network processor, another processing element, or to another memory.

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