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Circuit calibrating output driving strength of DRAM and method thereof
   
Document Number
US Patent 6958942
Issued Date
October 25, 2005
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Inventors
Chang; Chi (Hsin-Tien,TW)
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Abstract
A circuit for calibrating the output driving strength of a DRAM and method thereof is provided. A driving strength auto-compensation circuit is used to adjust the resistance value of an output generator inside a memory control chip and match with the target output driving strength of the DRAM. Hence, the input comparator of the memory control chip can be directly used to read from the DRAM and generate an output value so that extra high gain comparators are not required for accurately calibrating the output driving strength of the DRAM. Furthermore, the circuit is easy to implement and the calibrating process can be easily performed.
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Number of Claims:
11
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Owner
VIA Technologies, Inc. (Taipei Hsien,TW)
Published
October 25, 2005
Application Number
10/914,801
Filed
August 9, 2004
US Classification
365/189.07   365/189.05 365/189.11
Int'l Classification
G11C   29/02   (20060101)  
Examiner
Attorney/Law Firm
USPTO Field of Search
365/189.07   365/189.05   365/210  
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