or
Bookmark and Share
System and method for testing a circuit
   
Document Number
US Patent 6968488
Issued Date
November 22, 2005
Link
Inventors
Map
Abstract
Systems and methods for testing a circuit are provided. In one example, a sequential device for use in a scan chain is described. The sequential device may include a scan input, a scan output and a functional data output. The functional data output may be coupled to the scan input and to the scan output. The functional data output may be coupled to the scan output via a delay buffer.
Tags:
Description:
Amusing 0%
Clever 0%
Complex 0%
Efficient 0%
Historic 0%
Important 0%
Innovative 0%
Interesting 0%
Practical 0%
Simple 0%
Number of Claims:
25
Comments:
no comments yet
Owner
Published
November 22, 2005
Application Number
10/187,116
Filed
June 28, 2002
US Classification
714/726  
Int'l Classification
G01R   31/28   (20060101)   G01R   31/3185   (20060101)  
Attorney/Law Firm
Parent Case
RELATED APPLICATIONS This application makes reference to, claims priority to and claims benefit from U.S. Provisional Patent Application Ser. No. 60/361,004, entitled "Slow Scan Output," filed on Mar. 1, 2002.
USPTO Field of Search
714/726  
Related Patents
Claims
Description
About| FAQs| Terms & Disclaimer| Link to Us| Contact Us