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Integrated circuit and method of manufacturing an integrated circuit and package
   
Document Number
US Patent 7001834
Issued Date
February 21, 2006
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Abstract
A packaged IC includes an IC die with signal and signal complement traces positioned relative to each other to maximize broadside coupling for a matching impedance. The signal and signal complement traces are electrically connected to transmission or receive channels of the IC die. Use of a broadside coupled trace configuration alleviates routing congestion in an IC package and permits an IC to accommodate a greater number of channels within a given surface area than is possible under the prior art.
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Number of Claims:
9
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Published
February 21, 2006
Application Number
10/690,938
Filed
October 22, 2003
US Classification
438/599   257/E23.062 257/E23.07 438/598 438/614
Int'l Classification
H01L   21/44   (20060101)  
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Parent Case
This is a Divisional of application Ser. No. 10/114,625, filed on 04/02/2002 now abandoned, the entire disclosure of which is incorporated herein by reference.
USPTO Field of Search
438/598   438/599   438/123   438/106   438/611   438/614   257/691   257/692   257/775   257/666  
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