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Portable communication terminal, communication method of the portable communication terminal, program, and recording medium having the program recorded thereon
   
Document Number
US Patent 7003277
Issued Date
February 21, 2006
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Abstract
A communication control processor controls communication of a portable communication terminal with external units, in which a data processing control processor performs communication with the communication control processor and controls a ROM, a RAM, an operating unit, and a display unit. The data processing control processor is supplied with a first clock signal, while the communication control processor is supplied with a second clock signal based on the first clock signal from the data processing control processor. Thus, each of the processors can transmit Universal Asynchronous Receiver Transmitter data even when the other processor is in a sleep state without knowing it, and the other processor can receive the data without an error in reception. Furthermore, the data processing control processor and the communication control processor can turn on/off a high-speed clock, as in a sleep control, independently of each other. Thus, sleep time can be maximized, and consequently power consumption can be reduced.
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Number of Claims:
7
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Owner
Sony Corporation (Tokyo,JP)
Published
February 21, 2006
Application Number
10/242,173
Filed
September 12, 2002
US Classification
455/343.1   455/127.1 455/572 455/574
Int'l Classification
H04B   1/16   (20060101)  
Examiner
Assistant Examiner
Attorney/Law Firm
USPTO Field of Search
455/574   455/343.1   455/343.2   455/343.5  
Related Patents
7249271 - Data transfer control device and electronic instrument - Owned by Seiko Epson Corporation (Tokyo,JP)

A data transfer control device includes an OUT-transfer transmitter circuit which transmits OUT data by driving a serial signal line, a clock-transfer transmitter circuit which transmits a clock signal CLK by driving a serial signal line, a PLL circuit which generates the clock signal CLK, and a power-down setting circuit which sets a power-down mode. In a first power-down mode, the OUT-transfer transmitter circuit is set to the power-down mode, and the clock-transfer transmitter circuit is set to the power-down mode to stop a system clock signal of a target-side data transfer control device. In a second power-down mode, the OUT-transfer transmitter circuit is set to the power-down mode without setting the clock-transfer transmitter circuit to the power-down mode.

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Description
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