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Hardware-based encryption/decryption employing dual ported key storage
   
Document Number
US Patent 7006634
Issued Date
February 28, 2006
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Abstract
A system for the encryption and decryption of data employing dual ported RAM for key storage to accelerate data processing operations. The on-chip key storage includes a dual-ported memory device which allows keys to be loaded into memory simultaneous with keys being read out of memory. Thus, an encryption or decryption algorithm can proceed while keys are being loaded into memory.
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Number of Claims:
24
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Owner
Cisco Technology, Inc. (San Jose, CA)
Published
February 28, 2006
Application Number
09/675,069
Filed
September 28, 2000
US Classification
380/261   380/40 380/42 380/43
Int'l Classification
H04L   9/00   (20060101)  
Examiner
Assistant Examiner
Attorney/Law Firm
USPTO Field of Search
380/42   380/40   380/43   380/261  
Related Patents
7403615 - Methods and apparatus for accelerating ARC4 processing - Owned by Broadcom Corporation (Irvine, CA)

Methods and apparatus are provided for improving ARC4 processing in a cryptography engine. A multiple ported memory can be used to allow pipelined read and write access to values in memory. Coherency checking can be applied to provide that read-after-write and write-after-write consistency is maintained. Initialization of the memory can be improved with a reset feature occurring in a single cycle. Key shuffle and key stream generation can also be performed using a single core.

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Description
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