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Non-volatile memory architecture to improve read performance
   
Document Number
US Patent 7009880
Issued Date
March 7, 2006
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Abstract
A memory cell array is physically divided into an even number of sectors, with each pair of sectors sharing read circuitry. The outputs of the shared read circuitry are commonly connected to form data lines spanning the height of the array, which are input to global sense amplifiers. A two-stage sensing scheme is employed, with first stage and global sense amplifiers. The driving capability of the first stage sense amplifier can be used to decrease the time to charge or discharge the data lines, which reduces the total signal development time and consequently improves read performance. Granularity of the array can be adjusted by dividing groups and sub-groups of memory cells within a sector accordingly. In a read operation, the bit line in the opposite sector at the same column location is used as reference bit line, which greatly improves matching of bit line loading for the sensing.
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Number of Claims:
22
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Published
March 7, 2006
Application Number
10/921,042
Filed
August 17, 2004
US Classification
365/185.11   365/189.02 365/230.03
Int'l Classification
G11C   16/00   (20060101)  
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USPTO Field of Search
Related Patents
7564726 - Semiconductor memory device - Owned by Panasonic Corporation (Osaka,JP)

A semiconductor memory device includes a selector line selection circuit for selecting, in a read operation, a selector line for connecting a first main bit line connected to the sense amplifier with a sub-bit line to which the memory cell being read is connected, a selector line for connecting the first main bit line with a sub-bit line of at least one sector different from the sector to which the memory cell being read belongs, a selector line for connecting a second main bit line connected to the sense amplifier with a sub-bit line to which the reference cell is connected, and a selector line for connecting the second main bit line with a sub-bit line of at least one sector different from the sector to which the memory cell being read belongs.

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