A method for fabrication of silicon-on-nothing (SON) MOSFET using selective etching of Si.sub.1-xGe.sub.x layer, includes preparing a silicon substrate; growing an epitaxial Si.sub.1-xGe.sub.x layer on the silicon substrate; growing an epitaxial thin top silicon layer on the epitaxial Si.sub.1-xGe.sub.x layer; trench etching of the top silicon and Si.sub.1-xGe.sub.x, into the silicon substrate to form a first trench; selectively etching the Si.sub.1-xGe.sub.x layer to remove substantially all of the Si.sub.1-xGe.sub.x to form an air gap; depositing a layer of SiO.sub.2 by CVD to fill the first trench; trench etching to from a second trench; selectively etching the remaining Si.sub.1-xGe.sub.x layer; depositing a second layer of SiO.sub.2 by CVD to fill the second trench, thereby decoupling a source, a drain and a channel from the substrate; and completing the structure by state-of-the-art CMOS fabrication techniques.
The present invention is generally directed to a method of forming a pseudo SOI substrate and semiconductor devices. In one illustrative embodiment, the method comprises forming a plurality of trenches in a semiconducting substrate comprised of silicon, each of the trenches having a depth, forming a layer of insulating material within each of the plurality of trenches, the layer of insulating material having a thickness that is less than the depth of the trenches, and performing an anneal process on the substrate in a hydrogen environment to cause the silicon substrate material to merge above the layer of insulating material within the plurality of trenches to thereby define a pseudo SOI substrate.
The present invention is generally directed to a method of forming a pseudo SOI substrate and semiconductor devices. In one illustrative embodiment, the method comprises forming a plurality of trenches in a semiconducting substrate comprised of silicon, each of the trenches having a depth, forming a layer of insulating material within each of the plurality of trenches, the layer of insulating material having a thickness that is less than the depth of the trenches, and performing an anneal process on the substrate in a hydrogen environment to cause the silicon substrate material to merge above the layer of insulating material within the plurality of trenches to thereby define a pseudo SOI substrate.
The present invention relates to a semiconductor-on-insulator (SOI) substrate having one or more device regions. Each device region comprises at least a base semiconductor substrate layer and a semiconductor device layer with a buried insulator layer located therebetween, while the semiconductor device layer is supported by one or more vertical insulating pillars. The vertical insulating pillars each preferably has a ledge extending between the base semiconductor substrate layer and the semiconductor device layer. The SOI substrates of the present invention can be readily formed from a precursor substrate structure with a "floating" semiconductor device layer that is spaced apart from the base semiconductor substrate layer by an air gap and is supported by one or more vertical insulating pillars. The air gap is preferably formed by selective removal of a sacrificial layer located between the base semiconductor substrate layer and the semiconductor device layer.
