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Low noise fast stable voltage regulator circuit
   
Document Number
US Patent 7019499
Issued Date
March 28, 2006
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Inventors
Chiu; Chi-Kun (Tao-Yuan Hsien,TW)
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Abstract
A low noise voltage regulator circuit with fast stable output voltage is disclosed. The low noise voltage regulator circuit contains a reference voltage generator, for generating a reference voltage; a switching circuit, which is electrically coupled to the output of reference voltage generator and has two states; and a stabilizing circuit. When the switching circuit is at a first state, the reference voltage is coupled to the stabilizing circuit without being filtered; when the switching circuit is at a second state, the reference voltage is filtered by a low pass filter before being coupled to the stabilizing circuit. A switching control signal is used to switch the switching circuit between the two states. The filtered reference voltage is used to generate a low noise regulated output voltage.
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Number of Claims:
13
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Owner
MediaTek Inc. (Hsin-Chu Hsien,TW)
Published
March 28, 2006
Application Number
10/709,636
Filed
May 19, 2004
US Classification
323/279   323/280
Int'l Classification
G05F   1/40   (20060101)  
Examiner
Attorney/Law Firm
Priority Data
May 20, 2003 [TW] 92113647 A
USPTO Field of Search
323/279   323/280   323/274  
Related Patents
7397226 - Low noise, low power, fast startup, and low drop-out voltage regulator - Owned by National Semiconductor Corporation (Santa Clara, CA)

A circuit and method for providing voltage regulation that operates with relatively low noise, low power, fast start up and low dropout. The invention includes a constant voltage reference that is coupled to a reference amplifier which amplifies the reference voltage to a selectable level. The output of the reference amplifier is provided to an integrated low pass noise filter which suppresses at least the noise generated by the constant voltage reference and the reference amplifier. The output of the integrated noise filter is provided to the inverting input of an error amplifier, whose non-inverting input is coupled to the output voltage (VOUT). Also, the output of the error amplifier is coupled to a gate of a pass transistor that is coupled between the input voltage (VIN) and the output voltage (VOUT) of the invention.

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