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Hardware implementation of an N-way dynamic linked list
   
Document Number
US Patent 7035988
Issued Date
April 25, 2006
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Inventors
Marino; John (Mountain View, CA)
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Abstract
A hardware-implemented N-way dynamic link list is disclosed. The linked list memory structure comprises two basic parts for each stored location (entry)--a data element and pointer to the next element. Separate memory components provide a data organization that efficiently accesses any of N queues.
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Number of Claims:
20
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Published
April 25, 2006
Application Number
10/696,257
Filed
October 28, 2003
US Classification
711/170  
Int'l Classification
G06F   12/02   (20060101)  
Examiner
USPTO Field of Search
711/170   711/173   711/154  
Related Patents
7523284 - Method and apparatus for providing memory management within a system management mode - Owned by American Megatrends, Inc. (Norcross, GA)

Methods, systems, and computer-readable media are provided for managing memory within a system management mode ("SMM"). According to the method, a memory management program is executed within the SMM. The memory management program is operative to maintain a singly linked list having one or more descriptors for identifying allocated regions of system management random access memory ("SMRAM"). In particular, each descriptor identifies a region of SMRAM that has been allocated by the memory management program by storing an indication of the base memory address of the allocated region, an indication of the ending memory address for the allocated region, and a pointer to the next descriptor.

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Description
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