A novel output buffer circuit including an input circuit, a voltage generating circuit, and an output circuit forms a three-state buffer circuit. The output circuit includes a first transistor, a second transistor, a third transistor, and a fourth transistor. With such a configuration, a simple circuit using no high voltage insulated transistors and level shift circuits can be made, and the simple circuit can output either a low voltage signal or a high voltage signal responsive to a low voltage input signal, reduce the manufacturing cost and the delay of the risetime of the output signal, which are associated with a high voltage insulated transistor. Furthermore, cost can be reduced by miniaturization of the circuit size.
A control apparatus comprises a voltage source, a controlling unit and an enabling unit. The controlling unit receives an input signal and generates an output signal. The enabling unit controls whether the controlling unit generates the output signal or not according to an enabling signal. The enabling unit comprises a first switch, a second resistor, a third resistor and a third transistor. The first switch selectively turns on or off according to the enabling signal. A first terminal of the second resistor is coupled to the first switch. A first terminal of the third resistor is coupled to a second terminal of the second resistor and a second terminal of the third resistor is coupled to the ground terminal. A source of the third transistor is coupled to the ground terminal and a gate of the third transistor is coupled between the second and the third resistor.
